Searched refs:settling_time (Results 1 – 6 of 6) sorted by relevance
118 u32 settling_time; member173 while (timeout++ <= abb->settling_time) { in ti_abb_wait_txdone()181 if (timeout > abb->settling_time) { in ti_abb_wait_txdone()203 while (timeout++ <= abb->settling_time) { in ti_abb_clear_all_txdone()213 if (timeout > abb->settling_time) { in ti_abb_clear_all_txdone()427 ret = of_property_read_u32(dev->of_node, pname, &abb->settling_time); in ti_abb_init_timings()434 if (!abb->settling_time) { in ti_abb_init_timings()488 sr2_wt_cnt_val = DIV_ROUND_CLOSEST(abb->settling_time * 10, cycle_rate); in ti_abb_init_timings()
92 constraints->settling_time = pval; in of_get_regulation_constraints()97 if (constraints->settling_time_up && constraints->settling_time) { in of_get_regulation_constraints()107 if (constraints->settling_time_down && constraints->settling_time) { in of_get_regulation_constraints()
2847 else if (rdev->constraints->settling_time) in _regulator_set_voltage_time()2848 return rdev->constraints->settling_time; in _regulator_set_voltage_time()
35 unsigned int settling_time; member383 settling_cnt = DIV_ROUND_UP(priv->settling_time, adc_period * 8) - 1; in mx25_tcq_init()443 priv->settling_time = 250000; in mx25_tcq_parse_dt()460 of_property_read_u32(np, "fsl,settling-time-ns", &priv->settling_time); in mx25_tcq_parse_dt()
34 u8 settling_time; member51 u8 settling_time; member
180 unsigned int settling_time; member
