| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | soc15.c | 292 static uint32_t soc15_read_indexed_register(struct amdgpu_device *adev, u32 se_num, in soc15_read_indexed_register() argument
298 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
299 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in soc15_read_indexed_register()
303 if (se_num != 0xffffffff || sh_num != 0xffffffff) in soc15_read_indexed_register()
310 bool indexed, u32 se_num, in soc15_get_register_value() argument
314 return soc15_read_indexed_register(adev, se_num, sh_num, reg_offset); in soc15_get_register_value()
324 static int soc15_read_register(struct amdgpu_device *adev, u32 se_num, in soc15_read_register() argument
339 se_num, sh_num, reg_offset); in soc15_read_register()
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| D | gfx_v9_0.h | 29 void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num);
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| D | cik.c | 1027 bool indexed, u32 se_num, in cik_get_register_value() argument
1032 unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num; in cik_get_register_value()
1047 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1048 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in cik_get_register_value()
1052 if (se_num != 0xffffffff || sh_num != 0xffffffff) in cik_get_register_value()
1122 static int cik_read_register(struct amdgpu_device *adev, u32 se_num, in cik_read_register() argument
1134 *value = cik_get_register_value(adev, indexed, se_num, sh_num, in cik_read_register()
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| D | vi.c | 551 bool indexed, u32 se_num, in vi_get_register_value() argument
556 unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num; in vi_get_register_value()
571 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
572 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in vi_get_register_value()
576 if (se_num != 0xffffffff || sh_num != 0xffffffff) in vi_get_register_value()
646 static int vi_read_register(struct amdgpu_device *adev, u32 se_num, in vi_read_register() argument
658 *value = vi_get_register_value(adev, indexed, se_num, sh_num, in vi_read_register()
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| D | si.c | 1016 bool indexed, u32 se_num, in si_get_register_value() argument
1021 unsigned se_idx = (se_num == 0xffffffff) ? 0 : se_num; in si_get_register_value()
1034 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1035 amdgpu_gfx_select_se_sh(adev, se_num, sh_num, 0xffffffff); in si_get_register_value()
1039 if (se_num != 0xffffffff || sh_num != 0xffffffff) in si_get_register_value()
1090 static int si_read_register(struct amdgpu_device *adev, u32 se_num, in si_read_register() argument
1102 *value = si_get_register_value(adev, indexed, se_num, sh_num, in si_read_register()
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| D | amdgpu_kms.c | 553 unsigned se_num = (info->read_mmr_reg.instance >> in amdgpu_info_ioctl() local
562 if (se_num == AMDGPU_INFO_MMR_SE_INDEX_MASK) in amdgpu_info_ioctl()
563 se_num = 0xffffffff; in amdgpu_info_ioctl()
573 if (amdgpu_asic_read_register(adev, se_num, sh_num, in amdgpu_info_ioctl()
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| D | gfx_v6_0.c | 1280 static void gfx_v6_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, in gfx_v6_0_select_se_sh() argument
1290 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v6_0_select_se_sh()
1293 else if (se_num == 0xffffffff) in gfx_v6_0_select_se_sh()
1298 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v6_0_select_se_sh()
1301 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v6_0_select_se_sh()
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| D | gfx_v7_0.c | 1588 u32 se_num, u32 sh_num, u32 instance) in gfx_v7_0_select_se_sh() argument
1597 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in gfx_v7_0_select_se_sh()
1600 else if (se_num == 0xffffffff) in gfx_v7_0_select_se_sh()
1605 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v7_0_select_se_sh()
1608 (se_num << GRBM_GFX_INDEX__SE_INDEX__SHIFT); in gfx_v7_0_select_se_sh()
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| D | amdgpu.h | 862 void (*select_se_sh)(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
1143 int (*read_register)(struct amdgpu_device *adev, u32 se_num,
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| D | gfx_v9_0.c | 251 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance);
1670 static void gfx_v9_0_select_se_sh(struct amdgpu_device *adev, u32 se_num, u32 sh_num, u32 instance) in gfx_v9_0_select_se_sh() argument
1679 if (se_num == 0xffffffff) in gfx_v9_0_select_se_sh()
1682 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v9_0_select_se_sh()
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| D | gfx_v8_0.c | 3549 u32 se_num, u32 sh_num, u32 instance) in gfx_v8_0_select_se_sh() argument
3558 if (se_num == 0xffffffff) in gfx_v8_0_select_se_sh()
3561 data = REG_SET_FIELD(data, GRBM_GFX_INDEX, SE_INDEX, se_num); in gfx_v8_0_select_se_sh()
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| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | si.c | 2948 u32 se_num, u32 sh_num) in si_select_se_sh() argument
2952 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in si_select_se_sh()
2954 else if (se_num == 0xffffffff) in si_select_se_sh()
2957 data |= SH_BROADCAST_WRITES | SE_INDEX(se_num); in si_select_se_sh()
2959 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in si_select_se_sh()
2993 u32 se_num, u32 sh_per_se, in si_setup_spi() argument
2999 for (i = 0; i < se_num; i++) { in si_setup_spi()
3040 u32 se_num, u32 sh_per_se, in si_setup_rb() argument
3048 for (i = 0; i < se_num; i++) { in si_setup_rb()
3058 for (i = 0; i < max_rb_num_per_se * se_num; i++) { in si_setup_rb()
[all …]
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| D | cik.c | 3036 u32 se_num, u32 sh_num) in cik_select_se_sh() argument
3040 if ((se_num == 0xffffffff) && (sh_num == 0xffffffff)) in cik_select_se_sh()
3042 else if (se_num == 0xffffffff) in cik_select_se_sh()
3045 data |= SH_BROADCAST_WRITES | SE_INDEX(se_num); in cik_select_se_sh()
3047 data |= SH_INDEX(sh_num) | SE_INDEX(se_num); in cik_select_se_sh()
3112 u32 se_num, u32 sh_per_se, in cik_setup_rb() argument
3120 for (i = 0; i < se_num; i++) { in cik_setup_rb()
3133 for (i = 0; i < max_rb_num_per_se * se_num; i++) { in cik_setup_rb()
3141 for (i = 0; i < se_num; i++) { in cik_setup_rb()
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