Searched refs:sdhci_readw (Results 1 – 17 of 17) sorted by relevance
| /Linux-v4.19/drivers/mmc/host/ |
| D | sdhci.c | 63 sdhci_readw(host, SDHCI_HOST_VERSION)); in sdhci_dumpregs()
65 sdhci_readw(host, SDHCI_BLOCK_SIZE), in sdhci_dumpregs()
66 sdhci_readw(host, SDHCI_BLOCK_COUNT)); in sdhci_dumpregs()
69 sdhci_readw(host, SDHCI_TRANSFER_MODE)); in sdhci_dumpregs()
78 sdhci_readw(host, SDHCI_CLOCK_CONTROL)); in sdhci_dumpregs()
86 sdhci_readw(host, SDHCI_ACMD12_ERR), in sdhci_dumpregs()
87 sdhci_readw(host, SDHCI_SLOT_INT_STATUS)); in sdhci_dumpregs()
92 sdhci_readw(host, SDHCI_COMMAND), in sdhci_dumpregs()
101 sdhci_readw(host, SDHCI_HOST_CONTROL2)); in sdhci_dumpregs()
1037 mode = sdhci_readw(host, SDHCI_TRANSFER_MODE); in sdhci_set_transfer_mode()
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| D | sdhci_f_sdh30.c | 94 if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0) in sdhci_f_sdh30_reset()
187 ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG); in sdhci_f_sdh30_probe()
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| D | sdhci-cns3xxx.c | 65 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cns3xxx_set_clock()
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| D | sdhci-pci-dwc-mshc.c | 36 vendor_ptr = sdhci_readw(host, SDHCI_VENDOR_PTR_R); in sdhci_snps_set_clock()
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| D | sdhci-pci-arasan.c | 101 val = sdhci_readw(host, PHY_ADDR_REG); in arasan_phy_addr_poll()
125 *data = sdhci_readw(host, PHY_DAT_REG) & DATA_MASK; in arasan_phy_read()
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| D | sdhci-xenon.c | 37 while (!((reg = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in xenon_enable_internal_clk()
194 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_uhs_signaling()
280 reg = sdhci_readw(host, SDHCI_HOST_CONTROL2); in xenon_set_ios()
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| D | sdhci-of-at91.c | 72 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_at91_set_clock()
86 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_at91_set_clock()
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| D | sdhci-pci-o2micro.c | 68 reg = sdhci_readw(host, O2_SD_VENDOR_SETTING); in sdhci_o2_set_tuning_mode()
80 u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2); in __sdhci_o2_execute_tuning()
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| D | sdhci-sirf.c | 90 clock_setting = sdhci_readw(host, SDHCI_CLK_DELAY_SETTING); in sdhci_sirf_execute_tuning()
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| D | sdhci.h | 642 static inline u16 sdhci_readw(struct sdhci_host *host, int reg) in sdhci_readw() function
680 static inline u16 sdhci_readw(struct sdhci_host *host, int reg) in sdhci_readw() function
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| D | sdhci-s3c.c | 386 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in sdhci_cmu_set_clock()
402 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL)) in sdhci_cmu_set_clock()
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| D | sdhci-st.c | 270 u16 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_st_set_uhs_signaling()
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| D | sdhci-pxav3.c | 262 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in pxav3_set_uhs_signaling()
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| D | sdhci-xenon-phy.c | 360 while (!(sdhci_readw(host, XENON_SLOT_EXT_PRESENT_STATE) & in xenon_emmc_phy_enable_dll()
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| D | sdhci-of-esdhc.c | 836 host_ver = sdhci_readw(host, SDHCI_HOST_VERSION); in esdhc_init()
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| D | sdhci-pci-core.c | 1311 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
1315 val = sdhci_readw(host, SDHCI_HOST_CONTROL2); in amd_tuning_reset()
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| D | sdhci-msm.c | 1148 ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); in sdhci_msm_set_uhs_signaling()
1481 clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); in __sdhci_msm_set_clock()
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