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Searched refs:sdhci_readl (Results 1 – 16 of 16) sorted by relevance

/Linux-v4.19/drivers/mmc/host/
Dsdhci-xenon-phy.c238 reg = sdhci_readl(host, phy_regs->timing_adj); in xenon_emmc_phy_init()
268 reg = sdhci_readl(host, phy_regs->timing_adj); in xenon_emmc_phy_init()
334 reg = sdhci_readl(host, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
339 reg = sdhci_readl(host, phy_regs->dll_ctrl); in xenon_emmc_phy_enable_dll()
391 reg = sdhci_readl(host, XENON_SLOT_DLL_CUR_DLY_VAL); in xenon_emmc_phy_config_tuning()
401 reg = sdhci_readl(host, XENON_SLOT_OP_STATUS_CTRL); in xenon_emmc_phy_config_tuning()
419 reg = sdhci_readl(host, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_disable_strobe()
425 reg = sdhci_readl(host, XENON_EMMC_5_0_PHY_PAD_CONTROL); in xenon_emmc_phy_disable_strobe()
429 reg = sdhci_readl(host, XENON_EMMC_PHY_PAD_CONTROL1); in xenon_emmc_phy_disable_strobe()
453 reg = sdhci_readl(host, XENON_SLOT_EMMC_CTRL); in xenon_emmc_phy_strobe_delay_adj()
[all …]
Dsdhci-xenon.c32 reg = sdhci_readl(host, SDHCI_CLOCK_CONTROL); in xenon_enable_internal_clk()
56 reg = sdhci_readl(host, XENON_SYS_OP_CTRL); in xenon_set_sdclk_off_idle()
72 reg = sdhci_readl(host, XENON_SYS_OP_CTRL); in xenon_set_acg()
86 reg = sdhci_readl(host, XENON_SYS_OP_CTRL); in xenon_enable_sdhc()
104 reg = sdhci_readl(host, XENON_SYS_OP_CTRL); in xenon_disable_sdhc()
115 reg = sdhci_readl(host, XENON_SYS_EXT_OP_CTRL); in xenon_enable_sdhc_parallel_tran()
125 reg = sdhci_readl(host, XENON_SYS_EXT_OP_CTRL); in xenon_mask_cmd_conflict_err()
137 reg = sdhci_readl(host, XENON_SLOT_RETUNING_REQ_CTRL); in xenon_retune_setup()
142 reg = sdhci_readl(host, SDHCI_SIGNAL_ENABLE); in xenon_retune_setup()
145 reg = sdhci_readl(host, SDHCI_INT_ENABLE); in xenon_retune_setup()
[all …]
Dsdhci-bcm-kona.c69 val = sdhci_readl(host, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
73 while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) { in sdhci_bcm_kona_sd_reset()
81 val = sdhci_readl(host, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_reset()
101 val = sdhci_readl(host, KONA_SDHOST_COREIMR); in sdhci_bcm_kona_sd_init()
106 val = sdhci_readl(host, KONA_SDHOST_CORECTRL); in sdhci_bcm_kona_sd_init()
140 val = sdhci_readl(host, KONA_SDHOST_CORESTAT); in sdhci_bcm_kona_sd_card_emulate()
Dsdhci_f_sdh30.c62 ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2); in sdhci_f_sdh30_soft_voltage_switch()
74 ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_soft_voltage_switch()
79 ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING); in sdhci_f_sdh30_soft_voltage_switch()
100 ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_reset()
193 reg = sdhci_readl(host, F_SDH30_ESD_CONTROL); in sdhci_f_sdh30_probe()
198 reg = sdhci_readl(host, SDHCI_CAPABILITIES); in sdhci_f_sdh30_probe()
Dsdhci-pci-dwc-mshc.c39 reg = sdhci_readl(host, (SDHC_AT_CTRL_R + vendor_ptr)); in sdhci_snps_set_clock()
47 reg = sdhci_readl(host, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
63 reg = sdhci_readl(host, (SDHC_GPIO_OUT + vendor_ptr)); in sdhci_snps_set_clock()
Dsdhci-of-esdhc.c482 value = sdhci_readl(host, ESDHC_DMA_SYSCTL); in esdhc_of_enable_dma()
517 val = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); in esdhc_clock_enable()
529 while (!(sdhci_readl(host, ESDHC_PRSSTAT) & val)) { in esdhc_clock_enable()
569 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
586 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); in esdhc_of_set_clock()
594 while (!(sdhci_readl(host, ESDHC_PRSSTAT) & ESDHC_CLOCK_STABLE)) { in esdhc_of_set_clock()
611 ctrl = sdhci_readl(host, ESDHC_PROCTL); in esdhc_pltfm_set_bus_width()
639 val = sdhci_readl(host, ESDHC_TBCTL); in esdhc_reset()
679 val = sdhci_readl(host, ESDHC_PROCTL); in esdhc_signal_voltage_switch()
722 val = sdhci_readl(host, ESDHC_DMA_SYSCTL); in esdhc_execute_tuning()
[all …]
Dsdhci-brcmstb.c65 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in sdhci_brcmstb_probe()
68 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in sdhci_brcmstb_probe()
Dsdhci.c62 sdhci_readl(host, SDHCI_DMA_ADDRESS), in sdhci_dumpregs()
68 sdhci_readl(host, SDHCI_ARGUMENT), in sdhci_dumpregs()
71 sdhci_readl(host, SDHCI_PRESENT_STATE), in sdhci_dumpregs()
81 sdhci_readl(host, SDHCI_INT_STATUS)); in sdhci_dumpregs()
83 sdhci_readl(host, SDHCI_INT_ENABLE), in sdhci_dumpregs()
84 sdhci_readl(host, SDHCI_SIGNAL_ENABLE)); in sdhci_dumpregs()
89 sdhci_readl(host, SDHCI_CAPABILITIES), in sdhci_dumpregs()
90 sdhci_readl(host, SDHCI_CAPABILITIES_1)); in sdhci_dumpregs()
93 sdhci_readl(host, SDHCI_MAX_CURRENT)); in sdhci_dumpregs()
95 sdhci_readl(host, SDHCI_RESPONSE), in sdhci_dumpregs()
[all …]
Dsdhci-tegra.c153 misc_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_MISC_CTRL); in tegra_sdhci_reset()
154 clk_ctrl = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_reset()
199 val = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG); in tegra_sdhci_pad_autocalib()
264 reg = sdhci_readl(host, SDHCI_TEGRA_VENDOR_CLOCK_CTRL); in tegra_sdhci_set_tap()
Dsdhci-of-arasan.c235 vendor = sdhci_readl(host, SDHCI_ARASAN_VENDOR_REGISTER); in sdhci_arasan_hs400_enhanced_strobe()
333 reg = sdhci_readl(host, SDHCI_PRESENT_STATE); in sdhci_arasan_cqe_enable()
335 sdhci_readl(host, SDHCI_BUFFER); in sdhci_arasan_cqe_enable()
336 reg = sdhci_readl(host, SDHCI_PRESENT_STATE); in sdhci_arasan_cqe_enable()
Dsdhci-acpi.c383 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); in bxt_get_cd()
398 sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 && in intel_probe_slot()
399 sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807) in intel_probe_slot()
778 dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0); in sdhci_acpi_remove()
Dsdhci-pci-o2micro.c301 reg = sdhci_readl(host, O2_SD_VENDOR_SETTING); in sdhci_pci_o2_probe_slot()
327 reg = sdhci_readl(host, O2_SD_VENDOR_SETTING2); in sdhci_pci_o2_probe_slot()
Dsdhci.h634 static inline u32 sdhci_readl(struct sdhci_host *host, int reg) in sdhci_readl() function
675 static inline u32 sdhci_readl(struct sdhci_host *host, int reg) in sdhci_readl() function
Dsdhci-pxav3.c141 host->caps = sdhci_readl(host, SDHCI_CAPABILITIES); in armada_38x_quirks()
142 host->caps1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); in armada_38x_quirks()
Dsdhci-esdhc-imx.c733 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock()
752 temp = sdhci_readl(host, ESDHC_SYSTEM_CONTROL); in esdhc_pltfm_set_clock()
Dsdhci-pci-core.c572 ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT); in bxt_get_cd()
616 val = sdhci_readl(host, INTEL_HS400_ES_REG); in intel_hs400_enhanced_strobe()