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Searched refs:rt_sysc_m32 (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/arch/mips/pci/
Dpci-mt7620.c237 rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); in mt7620_pci_hw_init()
238 rt_sysc_m32(LC_CKDRVPD, PDRV_SW_SET, PPLL_DRV); in mt7620_pci_hw_init()
242 rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1); in mt7620_pci_hw_init()
248 rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); in mt7620_pci_hw_init()
253 rt_sysc_m32(LC_CKDRVHZ | LC_CKDRVOHZ, LC_CKDRVPD | PDRV_SW_SET, in mt7620_pci_hw_init()
264 rt_sysc_m32(BIT(16), 0, RALINK_GPIOMODE); in mt7628_pci_hw_init()
268 rt_sysc_m32(0, RALINK_PCIE0_CLK_EN, RALINK_CLKCFG1); in mt7628_pci_hw_init()
336 rt_sysc_m32(RALINK_PCIE0_CLK_EN, 0, RALINK_CLKCFG1); in mt7620_pci_probe()
338 rt_sysc_m32(LC_CKDRVPD, PDRV_SW_SET, PPLL_DRV); in mt7620_pci_probe()
/Linux-v4.19/drivers/staging/mt7621-pci/
Dpci-mt7621.c100 rt_sysc_m32(0, val, RALINK_RSTCTRL); \
102 rt_sysc_m32(val, 0, RALINK_RSTCTRL); \
107 rt_sysc_m32(val, 0, RALINK_RSTCTRL); \
109 rt_sysc_m32(0, val, RALINK_RSTCTRL); \
512 rt_sysc_m32(0, RALINK_PCIE_RST, RALINK_RSTCTRL); in mt7621_pci_probe()
513 rt_sysc_m32(0x30, 2 << 4, SYSC_REG_SYSTEM_CONFIG1); in mt7621_pci_probe()
515 rt_sysc_m32(0x80000000, 0, RALINK_PCIE_CLK_GEN); in mt7621_pci_probe()
516 rt_sysc_m32(0x7f000000, 0xa << 24, RALINK_PCIE_CLK_GEN1); in mt7621_pci_probe()
517 rt_sysc_m32(0, 0x80000000, RALINK_PCIE_CLK_GEN); in mt7621_pci_probe()
520 rt_sysc_m32(RALINK_PCIE_RST, 0, RALINK_RSTCTRL); in mt7621_pci_probe()
[all …]
/Linux-v4.19/drivers/staging/mt7621-eth/
Dgsw_mt7621.c83 rt_sysc_m32(MT7621_MDIO_DRV_MASK, 0, SYSC_PAD_RGMII2_MDIO); in mt7621_hw_init()
86 rt_sysc_m32(BIT(14), 0, SYSC_GPIO_MODE); in mt7621_hw_init()
89 rt_sysc_m32(MT7621_GE1_MODE_MASK, 0, SYSC_REG_CFG1); in mt7621_hw_init()
92 rt_sysc_m32(3 << 12, 0, SYSC_GPIO_MODE); in mt7621_hw_init()
/Linux-v4.19/arch/mips/include/asm/mach-ralink/
Dralink_regs.h48 static inline void rt_sysc_m32(u32 clr, u32 set, unsigned reg) in rt_sysc_m32() function
/Linux-v4.19/arch/mips/ralink/
Dreset.c90 rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL); in ralink_restart()