Searched refs:rsel (Results 1 – 5 of 5) sorted by relevance
57 u32 rsel = nvkm_rd32(device, 0x00e18c); in read_pll_src() local65 case 0x4028: id = !!(rsel & 0x00000004); break; in read_pll_src()66 case 0x4008: id = !!(rsel & 0x00000008); break; in read_pll_src()90 rsel = nvkm_rd32(device, 0x00c050); in read_pll_src()92 case 0x4020: rsel = (rsel & 0x00000003) >> 0; break; in read_pll_src()93 case 0x4008: rsel = (rsel & 0x0000000c) >> 2; break; in read_pll_src()94 case 0x4028: rsel = (rsel & 0x00001800) >> 11; break; in read_pll_src()95 case 0x4030: rsel = 3; break; in read_pll_src()101 switch (rsel) { in read_pll_src()
47 int rsel; member160 state->rsel) < 0) in smrt_set()356 state->deci = 0; state->csel = 0; state->rsel = 0; in smrt_info_get()358 state->deci = 0; state->csel = 0; state->rsel = 1; in smrt_info_get()360 state->deci = 0; state->csel = 1; state->rsel = 0; in smrt_info_get()362 state->deci = 0; state->csel = 1; state->rsel = 1; in smrt_info_get()364 state->deci = 1; state->csel = 0; state->rsel = 0; in smrt_info_get()366 state->deci = 1; state->csel = 0; state->rsel = 1; in smrt_info_get()368 state->deci = 1; state->csel = 1; state->rsel = 0; in smrt_info_get()370 state->deci = 1; state->csel = 1; state->rsel = 1; in smrt_info_get()[all …]
81 unsigned short rsel; /* select regs to load */ member287 udc_regs->rsel = UDC_RSEL_SEND; in sun3scsi_dma_setup()290 udc_regs->rsel = UDC_RSEL_RECV; in sun3scsi_dma_setup()
897 struct v4l2_rect r, *rsel; in coda_g_selection() local907 rsel = &q_data->rect; in coda_g_selection()912 rsel = &r; in coda_g_selection()920 rsel = &r; in coda_g_selection()931 s->r = *rsel; in coda_g_selection()
144 #define rsel(v,a) (((v)+(a))&0x7ff) macro
