Searched refs:rptr_offs (Results 1 – 24 of 24) sorted by relevance
91 adev->irq.ih.rptr_offs = (adev->irq.ih.ring_size / 4) + 1; in amdgpu_ih_ring_init()101 r = amdgpu_device_wb_get(adev, &adev->irq.ih.rptr_offs); in amdgpu_ih_ring_init()137 amdgpu_device_wb_free(adev, adev->irq.ih.rptr_offs); in amdgpu_ih_ring_fini()
55 unsigned rptr_offs; member
267 r = amdgpu_device_wb_get(adev, &ring->rptr_offs); in amdgpu_ring_init()352 amdgpu_device_wb_free(ring->adev, ring->rptr_offs); in amdgpu_ring_fini()
292 adev->irq.ih.ring[adev->irq.ih.rptr_offs] = adev->irq.ih.rptr; in tonga_ih_set_rptr()294 adev->wb.wb[adev->irq.ih.rptr_offs] = adev->irq.ih.rptr; in tonga_ih_set_rptr()
360 adev->irq.ih.ring[adev->irq.ih.rptr_offs] = adev->irq.ih.rptr; in vega10_ih_set_rptr()362 adev->wb.wb[adev->irq.ih.rptr_offs] = adev->irq.ih.rptr; in vega10_ih_set_rptr()
182 unsigned rptr_offs; member
43 return ring->adev->wb.wb[ring->rptr_offs>>2]; in si_dma_ring_get_rptr()154 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in si_dma_start()
165 rptr = ring->adev->wb.wb[ring->rptr_offs]; in cik_sdma_ring_get_rptr()438 wb_offset = (ring->rptr_offs * 4); in cik_sdma_gfx_resume()
194 return ring->adev->wb.wb[ring->rptr_offs] >> 2; in sdma_v2_4_ring_get_rptr()414 wb_offset = (ring->rptr_offs * 4); in sdma_v2_4_gfx_resume()
351 return ring->adev->wb.wb[ring->rptr_offs] >> 2; in sdma_v3_0_ring_get_rptr()653 wb_offset = (ring->rptr_offs * 4); in sdma_v3_0_gfx_resume()
281 rptr = ((u64 *)&ring->adev->wb.wb[ring->rptr_offs]); in sdma_v4_0_ring_get_rptr()630 wb_offset = (ring->rptr_offs * 4); in sdma_v4_0_gfx_resume()
2114 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v6_0_cp_gfx_resume()2139 return ring->adev->wb.wb[ring->rptr_offs]; in gfx_v6_0_ring_get_rptr()2203 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v6_0_cp_compute_resume()2222 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v6_0_cp_compute_resume()
2496 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v9_0_cp_gfx_resume()2790 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v9_0_mqd_init()3867 return ring->adev->wb.wb[ring->rptr_offs]; /* gfx9 is 32bit rptr*/ in gfx_v9_0_ring_get_rptr_gfx()4037 return ring->adev->wb.wb[ring->rptr_offs]; /* gfx9 hardware is 32bit rptr */ in gfx_v9_0_ring_get_rptr_compute()
2600 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v7_0_cp_gfx_resume()2628 return ring->adev->wb.wb[ring->rptr_offs]; in gfx_v7_0_ring_get_rptr()2962 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v7_0_mqd_init()
4502 rptr_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v8_0_cp_gfx_resume()4778 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v8_0_mqd_init()6284 return ring->adev->wb.wb[ring->rptr_offs]; in gfx_v8_0_ring_get_rptr()
376 unsigned rptr_offs, u32 nop) in radeon_ring_init() argument381 ring->rptr_offs = rptr_offs; in radeon_ring_init()
57 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_dma_get_rptr()
59 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cayman_dma_get_rptr()
69 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_sdma_get_rptr()
840 unsigned rptr_offs; member1039 unsigned rptr_offs, u32 nop);
1477 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cayman_gfx_get_rptr()
4129 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_gfx_get_rptr()4155 rptr = rdev->wb.wb[ring->rptr_offs/4]; in cik_compute_get_rptr()
1062 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); in r100_gfx_get_rptr()
2617 rptr = rdev->wb.wb[ring->rptr_offs/4]; in r600_gfx_get_rptr()
