| /Linux-v4.19/drivers/bus/fsl-mc/ |
| D | fsl-mc-allocator.c | 37 struct fsl_mc_resource_pool *res_pool; in fsl_mc_resource_pool_add_device() local
49 res_pool = &mc_bus->resource_pools[pool_type]; in fsl_mc_resource_pool_add_device()
50 if (res_pool->type != pool_type) in fsl_mc_resource_pool_add_device()
52 if (res_pool->mc_bus != mc_bus) in fsl_mc_resource_pool_add_device()
55 mutex_lock(&res_pool->mutex); in fsl_mc_resource_pool_add_device()
57 if (res_pool->max_count < 0) in fsl_mc_resource_pool_add_device()
59 if (res_pool->free_count < 0 || in fsl_mc_resource_pool_add_device()
60 res_pool->free_count > res_pool->max_count) in fsl_mc_resource_pool_add_device()
75 resource->parent_pool = res_pool; in fsl_mc_resource_pool_add_device()
77 list_add_tail(&resource->node, &res_pool->free_list); in fsl_mc_resource_pool_add_device()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/dcn10/ |
| D | dcn10_hw_sequencer.c | 65 const uint32_t ref_clk_mhz = dc_ctx->dc->res_pool->ref_clock_inKhz / 1000; in print_microsec()
94 hubbub1_wm_read_state(dc->res_pool->hubbub, &wm); in dcn10_log_hubbub_state()
118 struct resource_pool *pool = dc->res_pool; in dcn10_log_hubp_states()
233 struct resource_pool *pool = dc->res_pool; in dcn10_log_hw_state()
532 struct hubp *hubp = dc->res_pool->hubps[0]; in undo_DEGVIDCN10_253_wa()
552 struct hubp *hubp = dc->res_pool->hubps[0]; in apply_DEGVIDCN10_253_wa()
561 for (i = 0; i < dc->res_pool->pipe_count; i++) { in apply_DEGVIDCN10_253_wa()
562 if (!dc->res_pool->hubps[i]->power_gated) in apply_DEGVIDCN10_253_wa()
588 for (i = 0; i < dc->res_pool->pipe_count; i++) { in bios_golden_init()
608 for (i = 0; i < dc->res_pool->pipe_count; i++) { in false_optc_underflow_wa()
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| D | dcn10_resource.c | 1049 return dc->res_pool->hubbub->funcs->get_dcc_compression_cap( in dcn10_get_dcc_compression_cap()
1050 dc->res_pool->hubbub, in dcn10_get_dcc_compression_cap()
1234 dc->res_pool = &pool->base; in construct()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_hw_sequencer.c | 197 unsigned int underlay_idx = dc->res_pool->underlay_pipe_index; in dce110_enable_display_power_gating()
991 struct pp_smu_funcs_rv *pp_smu = core_dc->res_pool->pp_smu; in dce110_enable_audio_stream()
1036 update_audio_usage(&dc->current_state->res_ctx, dc->res_pool, pipe_ctx->stream_res.audio, false); in dce110_disable_audio_stream()
1458 for (i = 0; i < dc->res_pool->stream_enc_count; i++) { in power_down_encoders()
1459 dc->res_pool->stream_enc[i]->funcs->dp_blank( in power_down_encoders()
1460 dc->res_pool->stream_enc[i]); in power_down_encoders()
1483 for (i = 0; i < dc->res_pool->timing_generator_count; i++) { in power_down_controllers()
1484 dc->res_pool->timing_generators[i]->funcs->disable_crtc( in power_down_controllers()
1485 dc->res_pool->timing_generators[i]); in power_down_controllers()
1493 if (dc->res_pool->dp_clock_source->funcs->cs_power_down( in power_down_clock_sources()
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| D | dce110_resource.c | 794 dc->res_pool->underlay_pipe_index)) in build_mapped_resource()
821 dc->res_pool->pipe_count, in dce110_validate_bandwidth()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce100/ |
| D | dce100_hw_sequencer.c | 165 dce110_set_safe_displaymarks(&context->res_ctx, dc->res_pool); in dce100_set_bandwidth()
167 dc->res_pool->dccg->funcs->update_clocks( in dce100_set_bandwidth()
168 dc->res_pool->dccg, in dce100_set_bandwidth()
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| D | dce100_resource.c | 719 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dce100_validate_bandwidth()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc.c | 615 dc->res_pool = dc_create_resource_pool( in construct()
620 if (!dc->res_pool) in construct()
647 for (i = 0; i < dc->res_pool->pipe_count; i++) { in disable_dangling_plane()
687 full_pipe_count = dc->res_pool->pipe_count; in dc_create()
688 if (dc->res_pool->underlay_pipe_index != NO_UNDERLAY_PIPE) in dc_create()
692 dc->res_pool->stream_enc_count); in dc_create()
695 dc->caps.max_audios = dc->res_pool->audio_count; in dc_create()
701 if (dc->res_pool->dmcu != NULL) in dc_create()
702 dc->versions.dmcu_version = dc->res_pool->dmcu->dmcu_version; in dc_create()
733 int pipe_count = dc->res_pool->pipe_count; in enable_timing_multisync()
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| D | dc_resource.c | 106 struct resource_pool *res_pool = NULL; in dc_create_resource_pool() local
110 res_pool = dce80_create_resource_pool( in dc_create_resource_pool()
114 res_pool = dce81_create_resource_pool( in dc_create_resource_pool()
118 res_pool = dce83_create_resource_pool( in dc_create_resource_pool()
122 res_pool = dce100_create_resource_pool( in dc_create_resource_pool()
126 res_pool = dce110_create_resource_pool( in dc_create_resource_pool()
131 res_pool = dce112_create_resource_pool( in dc_create_resource_pool()
135 res_pool = dce120_create_resource_pool( in dc_create_resource_pool()
141 res_pool = dcn10_create_resource_pool( in dc_create_resource_pool()
150 if (res_pool != NULL) { in dc_create_resource_pool()
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| D | dc_debug.c | 316 unsigned int underlay_idx = core_dc->res_pool->underlay_pipe_index; in context_timing_trace()
320 for (i = 0; i < core_dc->res_pool->pipe_count; i++) { in context_timing_trace()
333 for (i = 0; i < core_dc->res_pool->pipe_count; i++) { in context_timing_trace()
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| D | dc_link.c | 400 struct audio_support *aud_support = &link->dc->res_pool->audio_support; in link_detect_sink()
594 struct audio_support *aud_support = &link->dc->res_pool->audio_support; in dc_link_detect()
1053 if (link->dc->res_pool->funcs->link_init) in construct()
1054 link->dc->res_pool->funcs->link_init(link); in construct()
1131 link->link_enc = link->dc->res_pool->funcs->link_enc_create( in construct()
2040 struct abm *abm = link->ctx->dc->res_pool->abm; in dc_link_get_backlight_level()
2052 struct abm *abm = core_dc->res_pool->abm; in dc_link_set_backlight_level()
2053 struct dmcu *dmcu = core_dc->res_pool->dmcu; in dc_link_set_backlight_level()
2104 struct abm *abm = core_dc->res_pool->abm; in dc_link_set_abm_disable()
2117 struct dmcu *dmcu = core_dc->res_pool->dmcu; in dc_link_set_psr_enable()
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| D | dc_surface.c | 118 for (i = 0; i < core_dc->res_pool->pipe_count; i++) { in dc_plane_get_status()
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| D | dc_link_hwss.c | 65 link->dc->res_pool->dp_clock_source; in dp_enable_link_phy()
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| D | dc_link_ddc.c | 653 aux_engine = ddc->ctx->dc->res_pool->engines[ddc_pin->pin_data->en]; in dc_link_aux_transfer()
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| D | dc_link_dp.c | 1126 dp_cs = link->dc->res_pool->dp_clock_source; in dp_verify_link_cap()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_clocks.c | 282 struct dmcu *dmcu = core_dc->res_pool->dmcu; in dce_psr_set_clock()
299 struct dmcu *dmcu = core_dc->res_pool->dmcu; in dce112_set_clock()
545 for (i = 0; i < dc->res_pool->pipe_count; i++) { in dcn1_ramp_up_dispclk_with_dpp()
572 &dc->res_pool->pp_smu_req; in dcn1_update_clocks()
574 struct pp_smu_funcs_rv *pp_smu = dc->res_pool->pp_smu; in dcn1_update_clocks()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/inc/ |
| D | hw_sequencer.h | 208 struct resource_pool *res_pool,
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_resource.c | 773 dc->res_pool->pipe_count, in dce112_validate_bandwidth()
845 dc->res_pool->dp_clock_source; in resource_map_phy_clock_resources()
848 &context->res_ctx, dc->res_pool, in resource_map_phy_clock_resources()
856 dc->res_pool, in resource_map_phy_clock_resources()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calcs.c | 268 input->src.dcc = pipe->plane_res.dpp->ctx->dc->res_pool->hubbub->funcs-> in pipe_ctx_to_e2e_pipe_params()
469 input.clks_cfg.refclk_mhz = dc->res_pool->ref_clock_inKhz / 1000.0; in dcn_bw_calc_rq_dlg_ttu()
698 const struct resource_pool *pool = dc->res_pool; in dcn_validate_bandwidth()
927 v->dcc_enable[input_idx] = dc->res_pool->hubbub->funcs->dcc_support_pixel_format( in dcn_validate_bandwidth()
1393 struct pp_smu_funcs_rv *pp = dc->res_pool->pp_smu; in dcn_bw_notify_pplib_of_wm_ranges()
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| /Linux-v4.19/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 289 struct resource_pool *res_pool; member
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