Searched refs:reg_table (Results 1 – 11 of 11) sorted by relevance
1584 struct atom_mc_reg_table *reg_table) in amdgpu_atombios_init_mc_reg_table() argument1592 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in amdgpu_atombios_init_mc_reg_table()1621 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table()1623 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table()1629 reg_table->last = i; in amdgpu_atombios_init_mc_reg_table()1635 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in amdgpu_atombios_init_mc_reg_table()1638 for (i = 0, j = 1; i < reg_table->last; i++) { in amdgpu_atombios_init_mc_reg_table()1639 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table()1640 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in amdgpu_atombios_init_mc_reg_table()1643 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()[all …]
193 struct atom_mc_reg_table *reg_table);
99 if (soc->reg_table[MTK_REG_MTK_COUNTER_BASE]) in mtk_get_drvinfo()242 if (soc->reg_table[MTK_REG_MTK_COUNTER_BASE]) { in mtk_set_ethtool_ops()
144 .reg_table = mt7621_reg_table,
466 const u16 *reg_table; member
2073 if (soc->reg_table) in mtk_probe()2074 mtk_reg_table = soc->reg_table; in mtk_probe()
272 static const struct reg_table { struct
299 const struct reg_table *t; in mt7601u_load_bbp_temp_table_bw()311 const struct reg_table *t; in mt7601u_bbp_temp()
3984 struct atom_mc_reg_table *reg_table) in radeon_atom_init_mc_reg_table() argument3992 memset(reg_table, 0, sizeof(struct atom_mc_reg_table)); in radeon_atom_init_mc_reg_table()4021 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table()4023 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table()4029 reg_table->last = i; in radeon_atom_init_mc_reg_table()4035 reg_table->mc_reg_table_entry[num_ranges].mclk_max = in radeon_atom_init_mc_reg_table()4038 for (i = 0, j = 1; i < reg_table->last; i++) { in radeon_atom_init_mc_reg_table()4039 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table()4040 reg_table->mc_reg_table_entry[num_ranges].mc_data[i] = in radeon_atom_init_mc_reg_table()4043 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()[all …]
343 struct atom_mc_reg_table *reg_table);
747 const struct drm_i915_reg_descriptor *reg_table, in check_sorted() argument755 u32 curr = i915_mmio_reg_offset(reg_table[i].addr); in check_sorted()
