Searched refs:reference_div (Results 1 – 12 of 12) sorted by relevance
118 p1pll->reference_div = RREG32_PLL(RADEON_PPLL_REF_DIV) & 0x3ff; in radeon_read_clocks_OF()119 if (p1pll->reference_div < 2) in radeon_read_clocks_OF()120 p1pll->reference_div = 12; in radeon_read_clocks_OF()121 p2pll->reference_div = p1pll->reference_div; in radeon_read_clocks_OF()147 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF()194 if (p1pll->reference_div < 2) { in radeon_get_clock_info()198 p1pll->reference_div = in radeon_get_clock_info()201 p1pll->reference_div = tmp & RADEON_PPLL_REF_DIV_MASK; in radeon_get_clock_info()202 if (p1pll->reference_div < 2) in radeon_get_clock_info()203 p1pll->reference_div = 12; in radeon_get_clock_info()[all …]
738 uint32_t reference_div = 0; in radeon_set_pll() local817 &reference_div, &post_divider); in radeon_set_pll()830 reference_div, in radeon_set_pll()833 pll_ref_div = reference_div; in radeon_set_pll()
975 ref_div_min = pll->reference_div; in radeon_compute_pll_avivo()981 ref_div_max = pll->reference_div; in radeon_compute_pll_avivo()1140 min_ref_div = max_ref_div = pll->reference_div; in radeon_compute_pll_legacy()
170 uint32_t reference_div; member
746 p1pll->reference_div = RBIOS16(pll_info + 0x10); in radeon_combios_get_clock_info()763 spll->reference_div = RBIOS16(pll_info + 0x1c); in radeon_combios_get_clock_info()778 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info()
1157 p1pll->reference_div = 0; in radeon_atom_get_clock_info()1203 spll->reference_div = 0; in radeon_atom_get_clock_info()1230 mpll->reference_div = 0; in radeon_atom_get_clock_info()
1095 pll->reference_div = radeon_crtc->pll_reference_div; in atombios_crtc_set_pll()
142 ref_div_min = pll->reference_div; in amdgpu_pll_compute()148 ref_div_max = pll->reference_div; in amdgpu_pll_compute()
288 spll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()311 mpll->reference_div = 0; in amdgpu_atomfirmware_get_clock_info()
196 uint32_t reference_div; member
593 ppll->reference_div = 0; in amdgpu_atombios_get_clock_info()633 spll->reference_div = 0; in amdgpu_atombios_get_clock_info()660 mpll->reference_div = 0; in amdgpu_atombios_get_clock_info()
851 pll->reference_div = amdgpu_crtc->pll_reference_div; in amdgpu_atombios_crtc_set_pll()
