Searched refs:ref_and_mask (Results 1 – 9 of 9) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | cik_sdma.c | 175 u32 ref_and_mask; in cik_sdma_hdp_flush_ring_emit() local
178 ref_and_mask = SDMA0; in cik_sdma_hdp_flush_ring_emit()
180 ref_and_mask = SDMA1; in cik_sdma_hdp_flush_ring_emit()
185 radeon_ring_write(ring, ref_and_mask); /* reference */ in cik_sdma_hdp_flush_ring_emit()
186 radeon_ring_write(ring, ref_and_mask); /* mask */ in cik_sdma_hdp_flush_ring_emit()
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| D | cik.c | 3508 u32 ref_and_mask; in cik_hdp_flush_cp_ring_emit() local
3516 ref_and_mask = CP2 << ring->pipe; in cik_hdp_flush_cp_ring_emit()
3519 ref_and_mask = CP6 << ring->pipe; in cik_hdp_flush_cp_ring_emit()
3526 ref_and_mask = CP0; in cik_hdp_flush_cp_ring_emit()
3536 radeon_ring_write(ring, ref_and_mask); in cik_hdp_flush_cp_ring_emit()
3537 radeon_ring_write(ring, ref_and_mask); in cik_hdp_flush_cp_ring_emit()
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| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v2_4.c | 274 u32 ref_and_mask = 0; in sdma_v2_4_ring_emit_hdp_flush() local
277 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA0, 1); in sdma_v2_4_ring_emit_hdp_flush()
279 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v2_4_ring_emit_hdp_flush()
286 amdgpu_ring_write(ring, ref_and_mask); /* reference */ in sdma_v2_4_ring_emit_hdp_flush()
287 amdgpu_ring_write(ring, ref_and_mask); /* mask */ in sdma_v2_4_ring_emit_hdp_flush()
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| D | sdma_v3_0.c | 449 u32 ref_and_mask = 0; in sdma_v3_0_ring_emit_hdp_flush() local
452 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA0, 1); in sdma_v3_0_ring_emit_hdp_flush()
454 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA1, 1); in sdma_v3_0_ring_emit_hdp_flush()
461 amdgpu_ring_write(ring, ref_and_mask); /* reference */ in sdma_v3_0_ring_emit_hdp_flush()
462 amdgpu_ring_write(ring, ref_and_mask); /* mask */ in sdma_v3_0_ring_emit_hdp_flush()
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| D | cik_sdma.c | 247 u32 ref_and_mask; in cik_sdma_ring_emit_hdp_flush() local
250 ref_and_mask = GPU_HDP_FLUSH_DONE__SDMA0_MASK; in cik_sdma_ring_emit_hdp_flush()
252 ref_and_mask = GPU_HDP_FLUSH_DONE__SDMA1_MASK; in cik_sdma_ring_emit_hdp_flush()
257 amdgpu_ring_write(ring, ref_and_mask); /* reference */ in cik_sdma_ring_emit_hdp_flush()
258 amdgpu_ring_write(ring, ref_and_mask); /* mask */ in cik_sdma_ring_emit_hdp_flush()
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| D | sdma_v4_0.c | 433 u32 ref_and_mask = 0; in sdma_v4_0_ring_emit_hdp_flush() local
437 ref_and_mask = nbio_hf_reg->ref_and_mask_sdma0; in sdma_v4_0_ring_emit_hdp_flush()
439 ref_and_mask = nbio_hf_reg->ref_and_mask_sdma1; in sdma_v4_0_ring_emit_hdp_flush()
444 ref_and_mask, ref_and_mask, 10); in sdma_v4_0_ring_emit_hdp_flush()
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| D | gfx_v7_0.c | 2110 u32 ref_and_mask; in gfx_v7_0_ring_emit_hdp_flush() local
2116 ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK << ring->pipe; in gfx_v7_0_ring_emit_hdp_flush()
2119 ref_and_mask = GPU_HDP_FLUSH_DONE__CP6_MASK << ring->pipe; in gfx_v7_0_ring_emit_hdp_flush()
2125 ref_and_mask = GPU_HDP_FLUSH_DONE__CP0_MASK; in gfx_v7_0_ring_emit_hdp_flush()
2134 amdgpu_ring_write(ring, ref_and_mask); in gfx_v7_0_ring_emit_hdp_flush()
2135 amdgpu_ring_write(ring, ref_and_mask); in gfx_v7_0_ring_emit_hdp_flush()
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| D | gfx_v9_0.c | 3903 u32 ref_and_mask, reg_mem_engine; in gfx_v9_0_ring_emit_hdp_flush() local
3909 ref_and_mask = nbio_hf_reg->ref_and_mask_cp2 << ring->pipe; in gfx_v9_0_ring_emit_hdp_flush()
3912 ref_and_mask = nbio_hf_reg->ref_and_mask_cp6 << ring->pipe; in gfx_v9_0_ring_emit_hdp_flush()
3919 ref_and_mask = nbio_hf_reg->ref_and_mask_cp0; in gfx_v9_0_ring_emit_hdp_flush()
3926 ref_and_mask, ref_and_mask, 0x20); in gfx_v9_0_ring_emit_hdp_flush()
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| D | gfx_v8_0.c | 6314 u32 ref_and_mask, reg_mem_engine; in gfx_v8_0_ring_emit_hdp_flush() local
6320 ref_and_mask = GPU_HDP_FLUSH_DONE__CP2_MASK << ring->pipe; in gfx_v8_0_ring_emit_hdp_flush()
6323 ref_and_mask = GPU_HDP_FLUSH_DONE__CP6_MASK << ring->pipe; in gfx_v8_0_ring_emit_hdp_flush()
6330 ref_and_mask = GPU_HDP_FLUSH_DONE__CP0_MASK; in gfx_v8_0_ring_emit_hdp_flush()
6340 amdgpu_ring_write(ring, ref_and_mask); in gfx_v8_0_ring_emit_hdp_flush()
6341 amdgpu_ring_write(ring, ref_and_mask); in gfx_v8_0_ring_emit_hdp_flush()
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