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Searched refs:readreg (Results 1 – 25 of 25) sorted by relevance

/Linux-v4.19/drivers/net/ethernet/cirrus/
Dmac89x0.c141 readreg(struct net_device *dev, int portno) in readreg() function
221 rev_type = readreg(dev, PRODUCT_ID_ADD); in mac89x0_device_probe()
241 if ((readreg(dev, PP_SelfST) & (EEPROM_PRESENT | EEPROM_OK)) == 0) { in mac89x0_device_probe()
247 unsigned short s = readreg(dev, PP_IA + i); in mac89x0_device_probe()
288 writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL) & ~ENABLE_IRQ); in net_open()
305 writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) | SERIAL_RX_ON | SERIAL_TX_ON); in net_open()
322 writereg(dev, PP_BusCTL, readreg(dev, PP_BusCTL) | ENABLE_IRQ); in net_open()
348 if ((readreg(dev, PP_BusST) & READY_FOR_TX_NOW) == 0) { in net_send_packet()
439 status = readreg(dev, PP_RxStatus); in net_rx()
455 length = readreg(dev, PP_RxLength); in net_rx()
[all …]
Dcs89x0.c224 readreg(struct net_device *dev, u16 regno) in readreg() function
249 while (readreg(dev, PP_SelfST) & SI_BUSY) in wait_eeprom_ready()
268 buffer[i] = readreg(dev, PP_EEData); in get_eeprom_data()
521 writereg(dev, PP_LineCTL, readreg(dev, PP_LineCTL) | SERIAL_TX_ON); in send_test_pkt()
531 if (readreg(dev, PP_BusST) & READY_FOR_TX_NOW) in send_test_pkt()
543 if ((readreg(dev, PP_TxEvent) & TX_SEND_OK_BITS) == TX_OK) { in send_test_pkt()
581 if ((readreg(dev, PP_LineST) & LINK_OK) == 0) in detect_tp()
601 readreg(dev, PP_TestCTL) | FDX_8900); in detect_tp()
604 fdx = readreg(dev, PP_TestCTL) & FDX_8900; in detect_tp()
622 while (readreg(dev, PP_AutoNegST) & AUTO_NEG_BUSY) { in detect_tp()
[all …]
/Linux-v4.19/drivers/isdn/hisax/
Dasuscom.c44 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
80 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset)); in ReadISAC()
104 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80)); in ReadISAC_IPAC()
128 return (readreg(cs->hw.asus.adr, in ReadHSCX()
143 #define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \
164 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40); in asuscom_interrupt()
168 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA); in asuscom_interrupt()
172 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40); in asuscom_interrupt()
178 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA); in asuscom_interrupt()
202 ista = readreg(cs->hw.asus.adr, cs->hw.asus.isac, IPAC_ISTA); in asuscom_interrupt_ipac()
[all …]
Dmic.c32 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
68 return (readreg(cs->hw.mic.adr, cs->hw.mic.isac, offset)); in ReadISAC()
92 return (readreg(cs->hw.mic.adr, in ReadHSCX()
107 #define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \
128 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); in mic_interrupt()
132 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); in mic_interrupt()
136 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); in mic_interrupt()
142 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); in mic_interrupt()
Ds0box.c38 readreg(unsigned int padr, signed int addr, u_char off) { in readreg() function
98 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, offset)); in ReadISAC()
122 return (readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX()
135 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[nr], reg)
152 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA); in s0box_interrupt()
156 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA); in s0box_interrupt()
161 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA); in s0box_interrupt()
167 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA); in s0box_interrupt()
Dsedlbauer.c120 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
156 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset)); in ReadISAC()
180 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80)); in ReadISAC_IPAC()
204 return (readreg(cs->hw.sedl.adr, in ReadHSCX()
225 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, offset)); in ReadISAR()
247 #define READHSCX(cs, nr, reg) readreg(cs->hw.sedl.adr, \
276 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40); in sedlbauer_interrupt()
280 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA); in sedlbauer_interrupt()
284 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40); in sedlbauer_interrupt()
290 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA); in sedlbauer_interrupt()
[all …]
Dbkm_a4t.c27 readreg(unsigned int ale, unsigned long adr, u_char off) in readreg() function
46 *data++ = readreg(ale, adr, off); in readfifo()
76 return (readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset)); in ReadISAC()
100 …return (readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : … in ReadJADE()
113 #define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale, \
143 val = readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, jade_HDLC_ISR + 0x80); in bkm_interrupt()
148 val = readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, jade_HDLC_ISR + 0xC0); in bkm_interrupt()
153 val = readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, ISAC_ISTA); in bkm_interrupt()
Dix1_micro.c42 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
78 return (readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, offset)); in ReadISAC()
102 return (readreg(cs->hw.ix1.hscx_ale, in ReadHSCX()
113 #define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \
134 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40); in ix1micro_interrupt()
138 val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA); in ix1micro_interrupt()
142 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40); in ix1micro_interrupt()
148 val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA); in ix1micro_interrupt()
Dsaphir.c34 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
70 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, offset)); in ReadISAC()
94 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, in ReadHSCX()
105 #define READHSCX(cs, nr, reg) readreg(cs->hw.saphir.ale, \
126 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40); in saphir_interrupt()
130 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA); in saphir_interrupt()
134 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40); in saphir_interrupt()
140 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA); in saphir_interrupt()
Dbkm_a8.c41 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
80 return (readreg(cs->hw.ax.base, cs->hw.ax.data_adr, offset | 0x80)); in ReadISAC()
105 return (readreg(cs->hw.ax.base, cs->hw.ax.data_adr, offset + (hscx ? 0x40 : 0))); in ReadHSCX()
127 #define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \
146 ista = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ISTA); in bkm_interrupt_ipac()
155 val = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, HSCX_ISTA + 0x40); in bkm_interrupt_ipac()
167 val = 0xfe & readreg(cs->hw.ax.base, cs->hw.ax.data_adr, ISAC_ISTA | 0x80); in bkm_interrupt_ipac()
176 ista = readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ISTA); in bkm_interrupt_ipac()
431 readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID)); in setup_sct_quadro()
Dniccy.c46 static inline u_char readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
80 return readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset); in ReadISAC()
100 return readreg(cs->hw.niccy.hscx_ale, in ReadHSCX()
111 #define READHSCX(cs, nr, reg) readreg(cs->hw.niccy.hscx_ale, \
140 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, in niccy_interrupt()
145 val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA); in niccy_interrupt()
149 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, in niccy_interrupt()
156 val = readreg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_ISTA); in niccy_interrupt()
Davm_a1.c29 readreg(unsigned int adr, u_char off) in readreg() function
58 return (readreg(cs->hw.avm.isac, offset)); in ReadISAC()
82 return (readreg(cs->hw.avm.hscx[hscx], offset)); in ReadHSCX()
95 #define READHSCX(cs, nr, reg) readreg(cs->hw.avm.hscx[nr], reg)
117 val = readreg(cs->hw.avm.hscx[1], HSCX_ISTA); in avm_a1_interrupt()
122 val = readreg(cs->hw.avm.isac, ISAC_ISTA); in avm_a1_interrupt()
Dteles3.c29 readreg(unsigned int adr, u_char off) in readreg() function
58 return (readreg(cs->hw.teles3.isac, offset)); in ReadISAC()
82 return (readreg(cs->hw.teles3.hscx[hscx], offset)); in ReadHSCX()
95 #define READHSCX(cs, nr, reg) readreg(cs->hw.teles3.hscx[nr], reg)
112 val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA); in teles3_interrupt()
116 val = readreg(cs->hw.teles3.isac, ISAC_ISTA); in teles3_interrupt()
121 val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA); in teles3_interrupt()
127 val = readreg(cs->hw.teles3.isac, ISAC_ISTA); in teles3_interrupt()
Delsa.c142 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
178 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset)); in ReadISAC()
202 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset + 0x80)); in ReadISAC_IPAC()
226 return (readreg(cs->hw.elsa.ale, in ReadHSCX()
270 #define READHSCX(cs, nr, reg) readreg(cs->hw.elsa.ale, \
307 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40); in elsa_interrupt()
312 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA); in elsa_interrupt()
317 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40); in elsa_interrupt()
324 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA); in elsa_interrupt()
387 ista = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ISTA); in elsa_interrupt_ipac()
[all …]
Ddiva.c82 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
134 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset)); in ReadISAC()
158 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset + 0x80)); in ReadISAC_IPAC()
182 return (readreg(cs->hw.diva.hscx_adr, in ReadHSCX()
276 #define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \
299 val = readreg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_ISTA + 0x40); in diva_interrupt()
302 val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA); in diva_interrupt()
328 ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA); in diva_irq_ipac_isa()
333 val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, HSCX_ISTA + 0x40); in diva_irq_ipac_isa()
344 val = 0xfe & readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA + 0x80); in diva_irq_ipac_isa()
[all …]
Dteleint.c25 readreg(unsigned int ale, unsigned int adr, u_char off) in readreg() function
106 return (readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, offset)); in ReadISAC()
165 val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA); in TeleInt_interrupt()
169 val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA); in TeleInt_interrupt()
Dgazel.c45 readreg(unsigned int adr, u_short off) in readreg() function
113 return (readreg(cs->hw.gazel.isac, off2)); in ReadISAC()
210 return (readreg(cs->hw.gazel.hscx[hscx], off2)); in ReadHSCX()
/Linux-v4.19/drivers/staging/media/zoran/
Dzr36016.c76 if (ptr->codec->master_data->readreg) in zr36016_read()
79 readreg(ptr->codec, reg)) & 0xFF; in zr36016_read()
120 (ptr->codec->master_data->readreg)) { in zr36016_readi()
122 value = (ptr->codec->master_data->readreg(ptr->codec, ZR016_IDATA)) & 0xFF; // DATA in zr36016_readi()
Dvideocodec.h321 __u32(*readreg) (struct videocodec * codec, member
Dzr36050.c74 if (ptr->codec->master_data->readreg) in zr36050_read()
75 value = (ptr->codec->master_data->readreg(ptr->codec, in zr36050_read()
Dzr36060.c78 if (ptr->codec->master_data->readreg) in zr36060_read()
79 value = (ptr->codec->master_data->readreg(ptr->codec, in zr36060_read()
Dzoran_card.c1154 m->readreg = zr36060_read; in zoran_setup_videocodec()
1159 m->readreg = zr36050_read; in zoran_setup_videocodec()
1164 m->readreg = zr36016_read; in zoran_setup_videocodec()
/Linux-v4.19/drivers/video/fbdev/
Dgxt4500.c140 #define readreg(par, reg) readl((par)->regs + (reg)) macro
393 ctrlreg = readreg(par, DTG_CONTROL); in gxt4500_set_par()
398 tmp = readreg(par, PLL_C) & ~0x7f; in gxt4500_set_par()
493 ctrlreg = readreg(par, SYNC_CTL) & in gxt4500_set_par()
567 ctrl = readreg(par, SYNC_CTL); in gxt4500_blank()
569 dctl = readreg(par, DISP_CTL); in gxt4500_blank()
/Linux-v4.19/drivers/ide/
Dqd65xx.c270 u8 savereg, readreg; in qd_testreg() local
275 readreg = inb_p(port); in qd_testreg()
286 return (readreg != QD_TESTVAL); in qd_testreg()
/Linux-v4.19/drivers/net/ethernet/amd/
Dni65.c161 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
170 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG)) macro
463 if( (j=readreg(CSR0)) != 0x4) { in ni65_probe1()
515 if(readreg(CSR0) & CSR0_IDON) in ni65_probe1()
809 if( (i=readreg(CSR0) ) != 0x4) in ni65_lance_reinit()