Home
last modified time | relevance | path

Searched refs:rd32 (Results 1 – 25 of 67) sorted by relevance

123

/Linux-v4.19/drivers/net/ethernet/intel/igb/
De1000_mac.c58 reg = rd32(E1000_STATUS); in igb_get_bus_info_pcie()
153 bits = rd32(E1000_VLVF(regindex)) & E1000_VLVF_VLANID_MASK; in igb_find_vlvf_slot()
223 bits = rd32(E1000_VLVF(vlvf_index)); in igb_vfta_set()
528 rd32(E1000_CRCERRS); in igb_clear_hw_cntrs_base()
529 rd32(E1000_SYMERRS); in igb_clear_hw_cntrs_base()
530 rd32(E1000_MPC); in igb_clear_hw_cntrs_base()
531 rd32(E1000_SCC); in igb_clear_hw_cntrs_base()
532 rd32(E1000_ECOL); in igb_clear_hw_cntrs_base()
533 rd32(E1000_MCC); in igb_clear_hw_cntrs_base()
534 rd32(E1000_LATECOL); in igb_clear_hw_cntrs_base()
[all …]
De1000_82575.c96 reg = rd32(E1000_MDIC); in igb_sgmii_uses_mdio_82575()
104 reg = rd32(E1000_MDICNFG); in igb_sgmii_uses_mdio_82575()
192 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_init_phy_params_82575()
225 hw->bus.func = (rd32(E1000_STATUS) & E1000_STATUS_FUNC_MASK) >> in igb_init_phy_params_82575()
330 u32 eecd = rd32(E1000_EECD); in igb_init_nvm_params_82575()
453 (rd32(E1000_FWSM) & E1000_FWSM_MODE_MASK) in igb_init_mac_params_82575()
502 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_set_sfp_media_type_82575()
627 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_get_invariants_82575()
855 mdic = rd32(E1000_MDIC); in igb_get_phy_id_82575()
864 mdic = rd32(E1000_MDICNFG); in igb_get_phy_id_82575()
[all …]
Digb_ethtool.c146 status = rd32(E1000_STATUS); in igb_get_link_ksettings()
468 regs_buff[0] = rd32(E1000_CTRL); in igb_get_regs()
469 regs_buff[1] = rd32(E1000_STATUS); in igb_get_regs()
470 regs_buff[2] = rd32(E1000_CTRL_EXT); in igb_get_regs()
471 regs_buff[3] = rd32(E1000_MDIC); in igb_get_regs()
472 regs_buff[4] = rd32(E1000_SCTL); in igb_get_regs()
473 regs_buff[5] = rd32(E1000_CONNSW); in igb_get_regs()
474 regs_buff[6] = rd32(E1000_VET); in igb_get_regs()
475 regs_buff[7] = rd32(E1000_LEDCTL); in igb_get_regs()
476 regs_buff[8] = rd32(E1000_PBA); in igb_get_regs()
[all …]
Digb_ptp.c73 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82576()
74 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82576()
94 rd32(E1000_SYSTIMR); in igb_ptp_read_82580()
95 lo = rd32(E1000_SYSTIML); in igb_ptp_read_82580()
96 hi = rd32(E1000_SYSTIMH); in igb_ptp_read_82580()
115 rd32(E1000_SYSTIMR); in igb_ptp_read_i210()
116 nsec = rd32(E1000_SYSTIML); in igb_ptp_read_i210()
117 sec = rd32(E1000_SYSTIMH); in igb_ptp_read_i210()
372 ctrl = rd32(E1000_CTRL); in igb_pin_extts()
373 ctrl_ext = rd32(E1000_CTRL_EXT); in igb_pin_extts()
[all …]
De1000_i210.c30 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
46 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
63 swsm = rd32(E1000_SWSM); in igb_get_hw_semaphore_i210()
67 if (rd32(E1000_SWSM) & E1000_SWSM_SWESMBI) in igb_get_hw_semaphore_i210()
131 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_acquire_swfw_sync_i210()
170 swfw_sync = rd32(E1000_SW_FW_SYNC); in igb_release_swfw_sync_i210()
254 rd32(E1000_SRWR)) { in igb_write_nvm_srwr()
332 invm_dword = rd32(E1000_INVM_DATA_REG(i)); in igb_read_invm_word_i210()
457 invm_dword = rd32(E1000_INVM_DATA_REG(i)); in igb_read_invm_version()
633 reg = rd32(E1000_EECD); in igb_pool_flash_update_done_i210()
[all …]
Digb_main.c301 regs[n] = rd32(E1000_RDLEN(n)); in igb_regdump()
305 regs[n] = rd32(E1000_RDH(n)); in igb_regdump()
309 regs[n] = rd32(E1000_RDT(n)); in igb_regdump()
313 regs[n] = rd32(E1000_RXDCTL(n)); in igb_regdump()
317 regs[n] = rd32(E1000_RDBAL(n)); in igb_regdump()
321 regs[n] = rd32(E1000_RDBAH(n)); in igb_regdump()
325 regs[n] = rd32(E1000_RDBAL(n)); in igb_regdump()
329 regs[n] = rd32(E1000_TDBAH(n)); in igb_regdump()
333 regs[n] = rd32(E1000_TDLEN(n)); in igb_regdump()
337 regs[n] = rd32(E1000_TDH(n)); in igb_regdump()
[all …]
De1000_nvm.c53 u32 eecd = rd32(E1000_EECD); in igb_shift_out_eec_bits()
98 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
107 eecd = rd32(E1000_EECD); in igb_shift_in_eec_bits()
135 reg = rd32(E1000_EERD); in igb_poll_eerd_eewr_done()
137 reg = rd32(E1000_EEWR); in igb_poll_eerd_eewr_done()
160 u32 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
166 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
172 eecd = rd32(E1000_EECD); in igb_acquire_nvm()
195 u32 eecd = rd32(E1000_EECD); in igb_standby_nvm()
220 eecd = rd32(E1000_EECD); in e1000_stop_nvm()
[all …]
De1000_mbx.c243 u32 mbvficr = rd32(E1000_MBVFICR); in igb_check_for_bit_pf()
301 u32 vflre = rd32(E1000_VFLRE); in igb_check_for_rst_pf()
331 p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number)); in igb_obtain_mbx_lock_pf()
354 p2v_mailbox = rd32(E1000_P2VMAILBOX(vf_number)); in igb_release_mbx_lock_pf()
/Linux-v4.19/drivers/net/fjes/
Dfjes_ethtool.c209 regs_buff[0] = rd32(XSCT_OWNER_EPID); in fjes_get_regs()
210 regs_buff[1] = rd32(XSCT_MAX_EP); in fjes_get_regs()
213 regs_buff[4] = rd32(XSCT_DCTL); in fjes_get_regs()
216 regs_buff[8] = rd32(XSCT_CR); in fjes_get_regs()
217 regs_buff[9] = rd32(XSCT_CS); in fjes_get_regs()
218 regs_buff[10] = rd32(XSCT_SHSTSAL); in fjes_get_regs()
219 regs_buff[11] = rd32(XSCT_SHSTSAH); in fjes_get_regs()
221 regs_buff[13] = rd32(XSCT_REQBL); in fjes_get_regs()
222 regs_buff[14] = rd32(XSCT_REQBAL); in fjes_get_regs()
223 regs_buff[15] = rd32(XSCT_REQBAH); in fjes_get_regs()
[all …]
/Linux-v4.19/drivers/net/ethernet/intel/i40e/
Di40e_ptp.c43 lo = rd32(hw, I40E_PRTTSYN_TIME_L); in i40e_ptp_read()
44 hi = rd32(hw, I40E_PRTTSYN_TIME_H); in i40e_ptp_read()
230 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_1); in i40e_ptp_get_rx_events()
290 rd32(hw, I40E_PRTTSYN_RXTIME_H(i)); in i40e_ptp_rx_hang()
371 lo = rd32(hw, I40E_PRTTSYN_TXTIME_L); in i40e_ptp_tx_hwtstamp()
372 hi = rd32(hw, I40E_PRTTSYN_TXTIME_H); in i40e_ptp_tx_hwtstamp()
430 lo = rd32(hw, I40E_PRTTSYN_RXTIME_L(index)); in i40e_ptp_rx_hwtstamp()
431 hi = rd32(hw, I40E_PRTTSYN_RXTIME_H(index)); in i40e_ptp_rx_hwtstamp()
605 rd32(hw, I40E_PRTTSYN_STAT_0); in i40e_ptp_set_timestamp_mode()
606 rd32(hw, I40E_PRTTSYN_TXTIME_H); in i40e_ptp_set_timestamp_mode()
[all …]
Di40e_diag.c22 orig_val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
26 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
36 val = rd32(hw, reg); in i40e_diag_reg_pattern_test()
Di40e_adminq.c285 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
317 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
666 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
668 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
702 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40e_asq_done()
742 val = rd32(hw, hw->aq.asq.head); in i40e_asq_send_command()
889 if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) { in i40e_asq_send_command()
958 ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK; in i40e_clean_arq_element()
Di40e_lan_hmc.c105 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); in i40e_init_lan_hmc()
108 size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ); in i40e_init_lan_hmc()
125 obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX); in i40e_init_lan_hmc()
131 size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ); in i40e_init_lan_hmc()
148 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX); in i40e_init_lan_hmc()
154 size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ); in i40e_init_lan_hmc()
171 obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX); in i40e_init_lan_hmc()
177 size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ); in i40e_init_lan_hmc()
Di40e_common.c333 return !!(rd32(hw, hw->aq.asq.len) & in i40e_check_asq_alive()
918 port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) in i40e_init_shared_code()
921 ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >> in i40e_init_shared_code()
923 func_rid = rd32(hw, I40E_PF_FUNC_RID); in i40e_init_shared_code()
1060 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
1199 reg = rd32(hw, I40E_GLGEN_RSTAT); in i40e_poll_globr()
1231 grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) & in i40e_pf_reset()
1241 reg = rd32(hw, I40E_GLGEN_RSTAT); in i40e_pf_reset()
1253 reg = rd32(hw, I40E_GLNVM_ULD); in i40e_pf_reset()
1279 reg = rd32(hw, I40E_PFGEN_CTRL); in i40e_pf_reset()
[all …]
/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/core/
Dgpuobj.c76 .rd32 = nvkm_gpuobj_rd32_fast,
84 .rd32 = nvkm_gpuobj_heap_rd32,
139 .rd32 = nvkm_gpuobj_rd32_fast,
147 .rd32 = nvkm_gpuobj_rd32,
/Linux-v4.19/drivers/net/ethernet/intel/ice/
Dice_osdep.h14 #define rd32(a, reg) readl((a)->hw_addr + (reg)) macro
18 #define ice_flush(a) rd32((a), GLGEN_STAT)
Dice_controlq.c46 return (rd32(hw, cq->sq.len) & (cq->sq.len_mask | in ice_check_sq_alive()
325 reg = rd32(hw, cq->sq.bal); in ice_cfg_sq_regs()
357 reg = rd32(hw, cq->rq.bal); in ice_cfg_rq_regs()
750 while (rd32(hw, cq->sq.head) != ntc) { in ice_clean_sq()
752 "ntc %d head %d.\n", ntc, rd32(hw, cq->sq.head)); in ice_clean_sq()
780 return rd32(hw, cq->sq.head) == cq->sq.next_to_use; in ice_sq_done()
839 val = rd32(hw, cq->sq.head); in ice_sq_send_cmd()
1013 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask); in ice_clean_rq_elem()
1070 ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask); in ice_clean_rq_elem()
Dice_nvm.c197 gens_stat = rd32(hw, GLNVM_GENS); in ice_init_nvm()
204 fla = rd32(hw, GLNVM_FLA); in ice_init_nvm()
/Linux-v4.19/drivers/net/ethernet/intel/i40evf/
Di40e_adminq.c282 reg = rd32(hw, hw->aq.asq.bal); in i40e_config_asq_regs()
314 reg = rd32(hw, hw->aq.arq.bal); in i40e_config_arq_regs()
594 while (rd32(hw, hw->aq.asq.head) != ntc) { in i40e_clean_asq()
596 "ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head)); in i40e_clean_asq()
631 return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use; in i40evf_asq_done()
671 val = rd32(hw, hw->aq.asq.head); in i40evf_asq_send_command()
819 if (rd32(hw, hw->aq.asq.len) & I40E_VF_ATQLEN1_ATQCRIT_MASK) { in i40evf_asq_send_command()
888 ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK; in i40evf_clean_arq_element()
/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/pci/
Dnv4c.c28 .rd32 = nv40_pci_rd32,
Dgp100.c34 .rd32 = nv40_pci_rd32,
Dnv46.c41 .rd32 = nv40_pci_rd32,
Dg94.c29 .rd32 = nv40_pci_rd32,
Dgf106.c29 .rd32 = nv40_pci_rd32,
/Linux-v4.19/drivers/gpu/drm/nouveau/include/nvkm/core/
Dmemory.h42 u32 (*rd32)(struct nvkm_memory *, u64 offset); member
71 #define nvkm_ro32(o,a) (o)->ptrs->rd32((o), (a))

123