Searched refs:qla4_83xx_reg (Results 1 – 7 of 7) sorted by relevance
| /Linux-v4.19/drivers/scsi/qla4xxx/ |
| D | ql4_isr.c | 668 mailbox_out = &ha->qla4_83xx_reg->mailbox_out[0]; in qla4xxx_isr_decode_mailbox()
1033 readl(&ha->qla4_83xx_reg->mailbox_out[0])); in qla4_83xx_interrupt_service_routine()
1035 writel(0, &ha->qla4_83xx_reg->risc_intr); in qla4_83xx_interrupt_service_routine()
1041 writel(0, &ha->qla4_83xx_reg->mb_int_mask); in qla4_83xx_interrupt_service_routine()
1291 leg_int_ptr = readl(&ha->qla4_83xx_reg->leg_int_ptr); in qla4_83xx_intr_handler()
1314 writel(0, &ha->qla4_83xx_reg->leg_int_trig); in qla4_83xx_intr_handler()
1316 leg_int_ptr = readl(&ha->qla4_83xx_reg->leg_int_ptr); in qla4_83xx_intr_handler()
1322 leg_int_ptr = readl(&ha->qla4_83xx_reg->risc_intr); in qla4_83xx_intr_handler()
1360 ival = readl(&ha->qla4_83xx_reg->risc_intr); in qla4_83xx_mailbox_intr_handler()
1365 ival = readl(&ha->qla4_83xx_reg->mb_int_mask); in qla4_83xx_mailbox_intr_handler()
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| D | ql4_iocb.c | 197 writel(ha->request_in, &ha->qla4_83xx_reg->req_q_in); in qla4_83xx_queue_iocb()
198 readl(&ha->qla4_83xx_reg->req_q_in); in qla4_83xx_queue_iocb()
203 writel(ha->response_out, &ha->qla4_83xx_reg->rsp_q_out); in qla4_83xx_complete_iocb()
204 readl(&ha->qla4_83xx_reg->rsp_q_out); in qla4_83xx_complete_iocb()
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| D | ql4_83xx.c | 1275 ret = readl(&ha->qla4_83xx_reg->mbox_int); in qla4_83xx_disable_mbox_intrs()
1277 writel(mb_int, &ha->qla4_83xx_reg->mbox_int); in qla4_83xx_disable_mbox_intrs()
1278 writel(1, &ha->qla4_83xx_reg->leg_int_mask); in qla4_83xx_disable_mbox_intrs()
1302 writel(mb_int, &ha->qla4_83xx_reg->mbox_int); in qla4_83xx_enable_mbox_intrs()
1303 writel(0, &ha->qla4_83xx_reg->leg_int_mask); in qla4_83xx_enable_mbox_intrs()
1323 writel(mbx_cmd[i], &ha->qla4_83xx_reg->mailbox_in[i]); in qla4_83xx_queue_mbox_cmd()
1325 writel(mbx_cmd[0], &ha->qla4_83xx_reg->mailbox_in[0]); in qla4_83xx_queue_mbox_cmd()
1330 writel(HINT_MBX_INT_PENDING, &ha->qla4_83xx_reg->host_intr); in qla4_83xx_queue_mbox_cmd()
1337 intr_status = readl(&ha->qla4_83xx_reg->risc_intr); in qla4_83xx_process_mbox_intr()
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| D | ql4_init.c | 112 (unsigned long __iomem *)&ha->qla4_83xx_reg->req_q_in); in qla4xxx_init_rings()
114 (unsigned long __iomem *)&ha->qla4_83xx_reg->rsp_q_in); in qla4xxx_init_rings()
116 (unsigned long __iomem *)&ha->qla4_83xx_reg->rsp_q_out); in qla4xxx_init_rings()
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| D | ql4_def.h | 811 struct device_reg_83xx __iomem *qla4_83xx_reg; /* Base I/O address member
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| D | ql4_nx.c | 3617 writel(0, &ha->qla4_83xx_reg->risc_intr); in qla4_8xxx_load_risc()
3618 readl(&ha->qla4_83xx_reg->risc_intr); in qla4_8xxx_load_risc()
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| D | ql4_os.c | 5464 writel(0, &ha->qla4_83xx_reg->risc_intr); in qla4xxx_free_adapter()
5465 readl(&ha->qla4_83xx_reg->risc_intr); in qla4xxx_free_adapter()
5539 ha->qla4_83xx_reg = (struct device_reg_83xx __iomem *) in qla4_8xxx_iospace_config()
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