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/Linux-v4.19/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
Dgm200.c82 pmu_load(struct nv50_devinit *init, u8 type, bool post, in pmu_load() argument
92 if (!post) in pmu_load()
109 gm200_devinit_post(struct nvkm_devinit *base, bool post) in gm200_devinit_post() argument
126 ret = pmu_load(init, 0x04, post, &exec, &args); in gm200_devinit_post()
133 if (post) { in gm200_devinit_post()
141 if (post) { in gm200_devinit_post()
149 if (post) { in gm200_devinit_post()
162 pmu_load(init, 0x01, post, NULL, NULL); in gm200_devinit_post()
170 .post = gm200_devinit_post,
Dbase.c62 if (init && init->func->post) in nvkm_devinit_post()
63 ret = init->func->post(init, init->post); in nvkm_devinit_post()
74 init->post = true; in nvkm_devinit_fini()
88 init->post = init->force_post; in nvkm_devinit_preinit()
Dnv50.c103 if (!base->post) { in nv50_devinit_preinit()
106 base->post = true; in nv50_devinit_preinit()
112 if (!base->post) { in nv50_devinit_preinit()
116 base->post = true; in nv50_devinit_preinit()
137 while (init->base.post && dcb_outp_parse(bios, i, &ver, &hdr, &outp)) { in nv50_devinit_init()
169 .post = nv04_devinit_post,
Dpriv.h11 int (*post)(struct nvkm_devinit *, bool post); member
Dgf100.c104 base->post = ((nvkm_rd32(device, 0x2240c) & BIT(1)) == 0); in gf100_devinit_preinit()
111 .post = nv04_devinit_post,
Dnv1a.c33 .post = nv04_devinit_post,
Dgm107.c51 .post = nv04_devinit_post,
Dg84.c58 .post = nv04_devinit_post,
Dg98.c57 .post = nv04_devinit_post,
Dmcp89.c58 .post = nv04_devinit_post,
/Linux-v4.19/drivers/video/fbdev/matrox/
Dmatroxfb_misc.h9 unsigned int* in, unsigned int* feed, unsigned int* post);
13 unsigned int *post) in PLL_calcclock() argument
15 return matroxfb_PLL_calcclock(&minfo->features.pll, freq, fmax, in, feed, post); in PLL_calcclock()
/Linux-v4.19/arch/x86/include/asm/
Dparavirt_types.h531 pre, post, ...) \ argument
541 post \
551 post \
562 #define __PVOP_CALL(rettype, op, pre, post, ...) \ argument
564 EXTRA_CLOBBERS, pre, post, ##__VA_ARGS__)
566 #define __PVOP_CALLEESAVE(rettype, op, pre, post, ...) \ argument
569 pre, post, ##__VA_ARGS__)
572 #define ____PVOP_VCALL(op, clbr, call_clbr, extra_clbr, pre, post, ...) \ argument
578 post \
586 #define __PVOP_VCALL(op, pre, post, ...) \ argument
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/Linux-v4.19/sound/core/
Dpcm_timer.c36 unsigned long rate, mult, fsize, l, post; in snd_pcm_timer_resolution_change() local
52 post = 1; in snd_pcm_timer_resolution_change()
55 post *= 2; in snd_pcm_timer_resolution_change()
64 runtime->timer_resolution = (mult * fsize / rate) * post; in snd_pcm_timer_resolution_change()
/Linux-v4.19/Documentation/livepatch/
Dcallbacks.txt39 active), used to clean up post-patch callback
48 symmetry: pre-patch callbacks have a post-unpatch counterpart and
49 post-patch callbacks have a pre-unpatch counterpart. An unpatch
77 No post-patch, pre-unpatch, or post-unpatch callbacks will be executed
83 will only occur if their corresponding post-patch callback executed).
87 only the post-unpatch callback will be called.
102 patch the data *after* patching is complete with a post-patch callback,
111 may be possible to implement similar updates via pre/post-patch
116 pre/post-patch callback could iterate over all such devices, making a
125 pre/post-(un)patch combination, but a selection that demonstrates a few
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/Linux-v4.19/Documentation/devicetree/bindings/clock/
Dkeystone-pll.txt4 a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
18 - reg-names : control, multiplier and post-divider. The multiplier and
19 post-divider registers are applicable only for main pll clock
20 - fixed-postdiv : fixed post divider value. If absent, use clkod register bits
29 reg-names = "control", "multiplier", "post-divider";
/Linux-v4.19/tools/testing/selftests/tc-testing/creating-plugins/
DAddingPlugins.txt23 post (the post-suite stage)
52 post-suite method using this info passed in to the pre_suite method.
82 'post'
/Linux-v4.19/drivers/scsi/aacraid/
Drx.c352 } * post; in aac_rx_check_health() local
363 post = dma_alloc_coherent(&dev->pdev->dev, in aac_rx_check_health()
366 if (unlikely(post == NULL)) { in aac_rx_check_health()
371 post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS); in aac_rx_check_health()
372 post->Post_Address = cpu_to_le32(baddr); in aac_rx_check_health()
377 post, paddr); in aac_rx_check_health()
/Linux-v4.19/Documentation/devicetree/bindings/input/
Dhid-over-i2c.txt30 - post-power-on-delay-ms
33 - post-power-on-delay-ms: time required by the device after enabling its regulators
/Linux-v4.19/fs/ocfs2/
Drefcounttree.h86 struct ocfs2_post_refcount *post);
104 struct ocfs2_post_refcount *post);
/Linux-v4.19/Documentation/devicetree/bindings/ata/
Dsata_highbank.txt28 - calxeda,post-clocks: a u32 that indicates the number of additional clock
43 calxeda,post-clocks = <0>;
/Linux-v4.19/arch/powerpc/boot/dts/fsl/
Dt1042si-post.dtsi2 * T1042 Silicon/SoC Device Tree Source (post include)
35 #include "t1040si-post.dtsi"
Dt2080si-post.dtsi2 * T2080 Silicon/SoC Device Tree Source (post include)
35 /include/ "t2081si-post.dtsi"
/Linux-v4.19/Documentation/devicetree/bindings/leds/backlight/
Dpwm-backlight.txt13 - post-pwm-on-delay-ms: Delay in ms between setting an initial (non-zero) PWM
45 post-pwm-on-delay-ms = <10>;
/Linux-v4.19/tools/testing/selftests/tc-testing/
DREADME128 -P, --pause Pause execution just before post-suite stage
191 pre- and post-suite
192 pre- and post-case
193 pre- and post-execute stage
213 - post (post-suite)
/Linux-v4.19/drivers/spi/
Dspi-imx.c429 unsigned int pre, post; in mx51_ecspi_clkdiv() local
435 post = fls(fin) - fls(fspi); in mx51_ecspi_clkdiv()
436 if (fin > fspi << post) in mx51_ecspi_clkdiv()
437 post++; in mx51_ecspi_clkdiv()
441 post = max(4U, post) - 4; in mx51_ecspi_clkdiv()
442 if (unlikely(post > 0xf)) { in mx51_ecspi_clkdiv()
448 pre = DIV_ROUND_UP(fin, fspi << post) - 1; in mx51_ecspi_clkdiv()
451 __func__, fin, fspi, post, pre); in mx51_ecspi_clkdiv()
454 *fres = (fin / (pre + 1)) >> post; in mx51_ecspi_clkdiv()
457 (post << MX51_ECSPI_CTRL_POSTDIV_OFFSET); in mx51_ecspi_clkdiv()

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