Searched refs:pllsw (Results 1 – 1 of 1) sorted by relevance
453 u32 pllsw; member1332 val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw); in request_clock()1334 clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in request_clock()1510 u32 pllsw; in clock_rate() local1521 val |= clk_mgt[clock].pllsw; in clock_rate()1522 pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in clock_rate()1524 if (pllsw == PRCM_CLK_MGT_CLKPLLSW_SOC0) in clock_rate()1526 else if (pllsw == PRCM_CLK_MGT_CLKPLLSW_SOC1) in clock_rate()1528 else if (pllsw == PRCM_CLK_MGT_CLKPLLSW_DDR) in clock_rate()1672 src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), in round_clock_rate()[all …]
