Searched refs:pll_mode (Results 1 – 6 of 6) sorted by relevance
45 u32 pll_mode, pll_m, pll_n; in of_artpec6_clkctrl_setup() local68 pll_mode = (readl(clkdata->syscon_base) >> 6) & 3; in of_artpec6_clkctrl_setup()69 switch (pll_mode) { in of_artpec6_clkctrl_setup()
69 enum pll_mode { enum108 static inline enum pll_mode pll_frac_get_mode(struct clk_hw *hw) in pll_frac_get_mode()117 static inline void pll_frac_set_mode(struct clk_hw *hw, enum pll_mode mode) in pll_frac_set_mode()
586 u8 pll_mode; member754 pll_ratio_table[i].pll_mode in cs42l42_pll_config()
187 u8 pll_mode; member280 pll_entry->pll_mode << CS43130_PLL_MODE_SHIFT); in cs43130_pll_config()
684 u32 pll_mode : 1; member
1251 w100_pwr_state.pll_cntl.f.pll_mode = 0x0; /* uses VCO clock */ in w100_pwm_setup()
