Searched refs:pll_in_use (Results 1 – 6 of 6) sorted by relevance
1712 u32 pll_in_use = 0; in radeon_get_pll_use_mask() local1720 pll_in_use |= (1 << test_radeon_crtc->pll_id); in radeon_get_pll_use_mask()1722 return pll_in_use; in radeon_get_pll_use_mask()1854 u32 pll_in_use; in radeon_atom_pick_pll() local1878 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1879 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1881 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()1887 pll_in_use = radeon_get_pll_use_mask(crtc); in radeon_atom_pick_pll()1888 if (!(pll_in_use & (1 << ATOM_PPLL2))) in radeon_atom_pick_pll()1890 if (!(pll_in_use & (1 << ATOM_PPLL1))) in radeon_atom_pick_pll()[all …]
265 u32 pll_in_use = 0; in amdgpu_pll_get_use_mask() local273 pll_in_use |= (1 << test_amdgpu_crtc->pll_id); in amdgpu_pll_get_use_mask()275 return pll_in_use; in amdgpu_pll_get_use_mask()
2108 u32 pll_in_use; in dce_v8_0_pick_pll() local2131 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2132 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2134 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2140 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v8_0_pick_pll()2141 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v8_0_pick_pll()2143 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v8_0_pick_pll()2145 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v8_0_pick_pll()
2250 u32 pll_in_use; in dce_v11_0_pick_pll() local2307 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v11_0_pick_pll()2309 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2311 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()2316 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v11_0_pick_pll()2318 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v11_0_pick_pll()2320 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v11_0_pick_pll()
2217 u32 pll_in_use; in dce_v10_0_pick_pll() local2238 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v10_0_pick_pll()2239 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v10_0_pick_pll()2241 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v10_0_pick_pll()2243 if (!(pll_in_use & (1 << ATOM_PPLL0))) in dce_v10_0_pick_pll()
2111 u32 pll_in_use; in dce_v6_0_pick_pll() local2128 pll_in_use = amdgpu_pll_get_use_mask(crtc); in dce_v6_0_pick_pll()2129 if (!(pll_in_use & (1 << ATOM_PPLL2))) in dce_v6_0_pick_pll()2131 if (!(pll_in_use & (1 << ATOM_PPLL1))) in dce_v6_0_pick_pll()
