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Searched refs:pll_enable (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/arch/arm/mach-tegra/
Dsleep-tegra30.S99 .macro pll_enable, rd, r_car_base, pll_base, pll_misc macro
358 pll_enable r1, r0, CLK_RESET_PLLM_BASE, 0
359 pll_enable r1, r0, CLK_RESET_PLLC_BASE, 0
360 pll_enable r1, r0, CLK_RESET_PLLX_BASE, 0
371 pll_enable r1, r0, CLK_RESET_PLLM_BASE, CLK_RESET_PLLM_MISC
372 pll_enable r1, r0, CLK_RESET_PLLC_BASE, CLK_RESET_PLLC_MISC
373 pll_enable r1, r0, CLK_RESET_PLLX_BASE, CLK_RESET_PLLX_MISC
376 pll_enable r1, r0, CLK_RESET_PLLP_BASE, CLK_RESET_PLLP_MISC
377 pll_enable r1, r0, CLK_RESET_PLLA_BASE, CLK_RESET_PLLA_MISC
Dsleep-tegra20.S57 .macro pll_enable, rd, r_car_base, pll_base macro
358 pll_enable r1, r0, CLK_RESET_PLLM_BASE
359 pll_enable r1, r0, CLK_RESET_PLLP_BASE
360 pll_enable r1, r0, CLK_RESET_PLLC_BASE
/Linux-v4.19/sound/soc/codecs/
Dtas2552.c170 u8 pll_enable; in tas2552_setup_pll() local
180 pll_enable = snd_soc_component_read32(component, TAS2552_CFG_2) & TAS2552_PLL_ENABLE; in tas2552_setup_pll()
238 pll_enable); in tas2552_setup_pll()
/Linux-v4.19/drivers/clk/
Dclk-stm32h7.c706 static int pll_enable(struct clk_hw *hw) in pll_enable() function
776 .enable = pll_enable,
871 pll_enable(hwp); in odf_divider_set_rate()
901 pll_enable(hwp); in odf_gate_enable()
924 pll_enable(hwp); in odf_gate_disable()
Dclk-stm32mp1.c758 static int pll_enable(struct clk_hw *hw) in pll_enable() function
860 .enable = pll_enable,