Searched refs:pll_cntl (Results 1 – 2 of 2) sorted by relevance
970 union pll_cntl_u pll_cntl; member1074 w100_pwr_state.pll_cntl.f.pll_pwdn = 0x0; /* power down */ in w100_pll_adjust()1075 w100_pwr_state.pll_cntl.f.pll_reset = 0x0; /* not reset */ in w100_pll_adjust()1076 w100_pwr_state.pll_cntl.f.pll_tcpoff = 0x1; /* Hi-Z */ in w100_pll_adjust()1077 w100_pwr_state.pll_cntl.f.pll_pvg = 0x0; /* VCO gain = 0 */ in w100_pll_adjust()1078 w100_pwr_state.pll_cntl.f.pll_vcofr = 0x0; /* VCO frequency range control = off */ in w100_pll_adjust()1079 w100_pwr_state.pll_cntl.f.pll_ioffset = 0x0; /* current offset inside VCO = 0 */ in w100_pll_adjust()1080 w100_pwr_state.pll_cntl.f.pll_ring_off = 0x0; in w100_pll_adjust()1088 w100_pwr_state.pll_cntl.f.pll_dactal = 0xd; in w100_pll_adjust()1089 writel((u32) (w100_pwr_state.pll_cntl.val), remapped_regs + mmPLL_CNTL); in w100_pll_adjust()[all …]
62 u8 pll_cntl; member629 par->pll_cntl = PLL_MEMCLK_100000KHZ; /* 100 MHz -- use as default */ in i740fb_decode_var()818 i740outreg(par, XRX, PLL_CNTL, par->pll_cntl); in i740fb_set_par()
