Home
last modified time | relevance | path

Searched refs:pipe_ctx (Results 1 – 25 of 31) sorted by relevance

12

/Linux-v4.19/drivers/gpu/drm/amd/display/dc/inc/
Dhw_sequencer.h63 struct pipe_ctx;
88 struct pipe_ctx *pipe_ctx);
91 struct pipe_ctx *pipe_ctx,
96 struct pipe_ctx *pipe_ctx,
103 struct pipe_ctx *pipe_ctx);
107 struct pipe_ctx *pipe_ctx);
115 struct pipe_ctx *pipe_ctx);
118 struct pipe_ctx *pipe_ctx);
121 struct pipe_ctx *pipe_ctx,
125 struct pipe_ctx *pipe_ctx,
[all …]
Dresource.h88 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
94 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
117 struct pipe_ctx *pipe_ctx);
123 struct pipe_ctx *resource_get_head_pipe_for_stream(
134 struct pipe_ctx *find_idle_secondary_pipe(
163 struct pipe_ctx *pipe_ctx_old,
164 struct pipe_ctx *pipe_ctx);
Dcore_types.h79 struct pipe_ctx *pipe_ctx);
81 void core_link_disable_stream(struct pipe_ctx *pipe_ctx, int option);
83 void core_link_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
107 struct pipe_ctx *(*acquire_idle_pipe_for_layer)(
209 struct pipe_ctx { struct
222 struct pipe_ctx *top_pipe; argument
223 struct pipe_ctx *bottom_pipe; argument
234 struct pipe_ctx pipe_ctx[MAX_PIPES]; member
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_hw_sequencer.c264 dce110_set_input_transfer_func(struct pipe_ctx *pipe_ctx, in dce110_set_input_transfer_func() argument
267 struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp; in dce110_set_input_transfer_func()
592 dce110_set_output_transfer_func(struct pipe_ctx *pipe_ctx, in dce110_set_output_transfer_func() argument
595 struct transform *xfm = pipe_ctx->plane_res.xfm; in dce110_set_output_transfer_func()
618 struct pipe_ctx *pipe_ctx) in bios_parser_crtc_source_select() argument
625 const struct dc_sink *sink = pipe_ctx->stream->sink; in bios_parser_crtc_source_select()
627 crtc_source_select.engine_id = pipe_ctx->stream_res.stream_enc->id; in bios_parser_crtc_source_select()
628 crtc_source_select.controller_id = pipe_ctx->stream_res.tg->inst + 1; in bios_parser_crtc_source_select()
632 crtc_source_select.signal = pipe_ctx->stream->signal; in bios_parser_crtc_source_select()
634 crtc_source_select.sink_signal = pipe_ctx->stream->signal; in bios_parser_crtc_source_select()
[all …]
Ddce110_hw_sequencer.h44 void dce110_enable_stream(struct pipe_ctx *pipe_ctx);
46 void dce110_disable_stream(struct pipe_ctx *pipe_ctx, int option);
48 void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
51 void dce110_blank_stream(struct pipe_ctx *pipe_ctx);
53 void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx);
54 void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx, int option);
56 void dce110_update_info_frame(struct pipe_ctx *pipe_ctx);
58 void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable);
Ddce110_resource.c729 const struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() argument
732 const struct dc_stream_state *stream = pipe_ctx->stream; in get_pixel_clock_parameters()
740 pixel_clk_params->signal_type = pipe_ctx->stream->signal; in get_pixel_clock_parameters()
741 pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1; in get_pixel_clock_parameters()
760 void dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in dce110_resource_build_pipe_hw_param() argument
762 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in dce110_resource_build_pipe_hw_param()
763 pipe_ctx->clock_source->funcs->get_pix_clk_dividers( in dce110_resource_build_pipe_hw_param()
764 pipe_ctx->clock_source, in dce110_resource_build_pipe_hw_param()
765 &pipe_ctx->stream_res.pix_clk_params, in dce110_resource_build_pipe_hw_param()
766 &pipe_ctx->pll_settings); in dce110_resource_build_pipe_hw_param()
[all …]
Ddce110_resource.h41 void dce110_resource_build_pipe_hw_param(struct pipe_ctx *pipe_ctx);
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.c609 struct pipe_ctx *old_pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in false_optc_underflow_wa()
624 struct pipe_ctx *pipe_ctx, in dcn10_enable_stream_timing() argument
628 struct dc_stream_state *stream = pipe_ctx->stream; in dcn10_enable_stream_timing()
636 if (pipe_ctx->top_pipe != NULL) in dcn10_enable_stream_timing()
644 pipe_ctx->stream_res.tg->funcs->enable_optc_clock(pipe_ctx->stream_res.tg, true); in dcn10_enable_stream_timing()
646 if (false == pipe_ctx->clock_source->funcs->program_pix_clk( in dcn10_enable_stream_timing()
647 pipe_ctx->clock_source, in dcn10_enable_stream_timing()
648 &pipe_ctx->stream_res.pix_clk_params, in dcn10_enable_stream_timing()
649 &pipe_ctx->pll_settings)) { in dcn10_enable_stream_timing()
653 pipe_ctx->stream_res.tg->dlg_otg_param.vready_offset = pipe_ctx->pipe_dlg_param.vready_offset; in dcn10_enable_stream_timing()
[all …]
Ddcn10_hw_sequencer.h40 void hwss1_plane_atomic_disconnect(struct dc *dc, struct pipe_ctx *pipe_ctx);
46 struct pipe_ctx *pipe_ctx,
Ddcn10_resource.c915 const struct pipe_ctx *pipe_ctx, in get_pixel_clock_parameters() argument
918 const struct dc_stream_state *stream = pipe_ctx->stream; in get_pixel_clock_parameters()
921 pixel_clk_params->signal_type = pipe_ctx->stream->signal; in get_pixel_clock_parameters()
922 pixel_clk_params->controller_id = pipe_ctx->stream_res.tg->inst + 1; in get_pixel_clock_parameters()
947 static void build_pipe_hw_param(struct pipe_ctx *pipe_ctx) in build_pipe_hw_param() argument
950 get_pixel_clock_parameters(pipe_ctx, &pipe_ctx->stream_res.pix_clk_params); in build_pipe_hw_param()
952 pipe_ctx->clock_source->funcs->get_pix_clk_dividers( in build_pipe_hw_param()
953 pipe_ctx->clock_source, in build_pipe_hw_param()
954 &pipe_ctx->stream_res.pix_clk_params, in build_pipe_hw_param()
955 &pipe_ctx->pll_settings); in build_pipe_hw_param()
[all …]
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c377 const struct pipe_ctx *pipe_with_clk_src, in is_sharable_clk_src()
378 const struct pipe_ctx *pipe) in is_sharable_clk_src()
409 struct pipe_ctx *pipe_ctx) in resource_find_used_clk_src_for_sharing() argument
414 if (is_sharable_clk_src(&res_ctx->pipe_ctx[i], pipe_ctx)) in resource_find_used_clk_src_for_sharing()
415 return res_ctx->pipe_ctx[i].clock_source; in resource_find_used_clk_src_for_sharing()
477 static void calculate_viewport(struct pipe_ctx *pipe_ctx) in calculate_viewport() argument
479 const struct dc_plane_state *plane_state = pipe_ctx->plane_state; in calculate_viewport()
480 const struct dc_stream_state *stream = pipe_ctx->stream; in calculate_viewport()
481 struct scaler_data *data = &pipe_ctx->plane_res.scl_data; in calculate_viewport()
486 bool pri_split = pipe_ctx->bottom_pipe && in calculate_viewport()
[all …]
Ddc_stream.c183 struct pipe_ctx *pipe_to_program = NULL; in dc_stream_set_cursor_attributes()
204 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in dc_stream_set_cursor_attributes() local
206 if (pipe_ctx->stream != stream) in dc_stream_set_cursor_attributes()
208 if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state) in dc_stream_set_cursor_attributes()
212 pipe_to_program = pipe_ctx; in dc_stream_set_cursor_attributes()
216 core_dc->hwss.set_cursor_attribute(pipe_ctx); in dc_stream_set_cursor_attributes()
218 core_dc->hwss.set_cursor_sdr_white_level(pipe_ctx); in dc_stream_set_cursor_attributes()
234 struct pipe_ctx *pipe_to_program = NULL; in dc_stream_set_cursor_position()
251 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in dc_stream_set_cursor_position() local
253 if (pipe_ctx->stream != stream || in dc_stream_set_cursor_position()
[all …]
Ddc_link.c1290 static void enable_stream_features(struct pipe_ctx *pipe_ctx) in enable_stream_features() argument
1292 struct dc_stream_state *stream = pipe_ctx->stream; in enable_stream_features()
1313 struct pipe_ctx *pipe_ctx) in enable_link_dp() argument
1315 struct dc_stream_state *stream = pipe_ctx->stream; in enable_link_dp()
1346 pipe_ctx->stream->signal, in enable_link_dp()
1347 pipe_ctx->clock_source->id, in enable_link_dp()
1375 enable_stream_features(pipe_ctx); in enable_link_dp()
1382 struct pipe_ctx *pipe_ctx) in enable_link_edp() argument
1385 struct dc_stream_state *stream = pipe_ctx->stream; in enable_link_edp()
1391 status = enable_link_dp(state, pipe_ctx); in enable_link_edp()
[all …]
Ddc.c200 struct pipe_ctx *pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_adjust_vmin_vmax()
226 struct pipe_ctx *pipe = in dc_stream_get_crtc_position()
227 &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crtc_position()
255 struct pipe_ctx *pipe; in dc_stream_configure_crc()
260 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_configure_crc()
305 struct pipe_ctx *pipe; in dc_stream_get_crc()
309 pipe = &dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_get_crc()
330 struct pipe_ctx *pipes = NULL; in dc_stream_set_dither_option()
334 if (link->dc->current_state->res_ctx.pipe_ctx[i].stream == in dc_stream_set_dither_option()
336 pipes = &link->dc->current_state->res_ctx.pipe_ctx[i]; in dc_stream_set_dither_option()
[all …]
Ddc_debug.c321 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
325 if (pipe_ctx->stream == NULL in context_timing_trace()
326 || pipe_ctx->pipe_idx == underlay_idx) in context_timing_trace()
329 pipe_ctx->stream_res.tg->funcs->get_position(pipe_ctx->stream_res.tg, &position); in context_timing_trace()
334 struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i]; in context_timing_trace() local
336 if (pipe_ctx->stream == NULL) in context_timing_trace()
340 pipe_ctx->stream_res.tg->inst, in context_timing_trace()
341 pipe_ctx->stream->timing.h_total, in context_timing_trace()
342 pipe_ctx->stream->timing.v_total, in context_timing_trace()
Ddc_surface.c119 struct pipe_ctx *pipe_ctx = in dc_plane_get_status() local
120 &core_dc->current_state->res_ctx.pipe_ctx[i]; in dc_plane_get_status()
122 if (pipe_ctx->plane_state != plane_state) in dc_plane_get_status()
125 core_dc->hwss.update_pending_status(pipe_ctx); in dc_plane_get_status()
Ddc_link_dp.c2511 struct pipe_ctx *pipe_ctx, in set_crtc_test_pattern() argument
2515 enum dc_color_depth color_depth = pipe_ctx-> in set_crtc_test_pattern()
2556 pipe_ctx->stream->bit_depth_params = params; in set_crtc_test_pattern()
2557 pipe_ctx->stream_res.opp->funcs-> in set_crtc_test_pattern()
2558 opp_program_bit_depth_reduction(pipe_ctx->stream_res.opp, &params); in set_crtc_test_pattern()
2559 if (pipe_ctx->stream_res.tg->funcs->set_test_pattern) in set_crtc_test_pattern()
2560 pipe_ctx->stream_res.tg->funcs->set_test_pattern(pipe_ctx->stream_res.tg, in set_crtc_test_pattern()
2567 resource_build_bit_depth_reduction_params(pipe_ctx->stream, in set_crtc_test_pattern()
2569 pipe_ctx->stream->bit_depth_params = params; in set_crtc_test_pattern()
2570 pipe_ctx->stream_res.opp->funcs-> in set_crtc_test_pattern()
[all …]
Ddc_link_hwss.c62 struct pipe_ctx *pipes = in dp_enable_link_phy()
63 link->dc->current_state->res_ctx.pipe_ctx; in dp_enable_link_phy()
274 struct pipe_ctx *pipes = in dp_retrain_link_dp_test()
275 &link->dc->current_state->res_ctx.pipe_ctx[0]; in dp_retrain_link_dp_test()
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_hw_sequencer.c139 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[i]; in get_max_pixel_clock_for_all_paths() local
141 if (pipe_ctx->stream == NULL) in get_max_pixel_clock_for_all_paths()
145 if (pipe_ctx->top_pipe) in get_max_pixel_clock_for_all_paths()
148 if (pipe_ctx->stream_res.pix_clk_params.requested_pix_clk > max_pix_clk) in get_max_pixel_clock_for_all_paths()
150 pipe_ctx->stream_res.pix_clk_params.requested_pix_clk; in get_max_pixel_clock_for_all_paths()
Ddce100_resource.c700 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in build_mapped_resource() local
702 if (!pipe_ctx) in build_mapped_resource()
705 dce110_resource_build_pipe_hw_param(pipe_ctx); in build_mapped_resource()
707 resource_build_info_frame(pipe_ctx); in build_mapped_resource()
720 if (context->res_ctx.pipe_ctx[i].stream) in dce100_validate_bandwidth()
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_resource.c746 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream(&context->res_ctx, stream); in build_mapped_resource() local
748 if (!pipe_ctx) in build_mapped_resource()
751 dce110_resource_build_pipe_hw_param(pipe_ctx); in build_mapped_resource()
753 resource_build_info_frame(pipe_ctx); in build_mapped_resource()
772 context->res_ctx.pipe_ctx, in dce112_validate_bandwidth()
836 struct pipe_ctx *pipe_ctx = resource_get_head_pipe_for_stream( in resource_map_phy_clock_resources() local
839 if (!pipe_ctx) in resource_map_phy_clock_resources()
842 if (dc_is_dp_signal(pipe_ctx->stream->signal) in resource_map_phy_clock_resources()
843 || pipe_ctx->stream->signal == SIGNAL_TYPE_VIRTUAL) in resource_map_phy_clock_resources()
844 pipe_ctx->clock_source = in resource_map_phy_clock_resources()
[all …]
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clock_source.c617 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[inst]; in dce110_get_pll_pixel_rate_in_hz() local
620 return pipe_ctx->stream->phy_pix_clk; in dce110_get_pll_pixel_rate_in_hz()
632 struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[inst]; in dce110_get_dp_pixel_rate_from_combo_phy_pll() local
635 return pipe_ctx->stream->phy_pix_clk; in dce110_get_dp_pixel_rate_from_combo_phy_pll()
Ddce_clocks.c546 struct pipe_ctx *pipe_ctx = &dc->current_state->res_ctx.pipe_ctx[i]; in dcn1_ramp_up_dispclk_with_dpp() local
548 if (!pipe_ctx->plane_state) in dcn1_ramp_up_dispclk_with_dpp()
551 pipe_ctx->plane_res.dpp->funcs->dpp_dppclk_control( in dcn1_ramp_up_dispclk_with_dpp()
552 pipe_ctx->plane_res.dpp, in dcn1_ramp_up_dispclk_with_dpp()
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/inc/hw/
Dlink_encoder.h42 struct pipe_ctx;
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c244 const struct pipe_ctx *pipe, in pipe_ctx_to_e2e_pipe_params()
430 struct pipe_ctx *pipe, in dcn_bw_calc_rq_dlg_ttu()
498 struct pipe_ctx *primary_pipe, in split_stream_across_pipes()
499 struct pipe_ctx *secondary_pipe) in split_stream_across_pipes()
830 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn_validate_bandwidth()
1082 struct pipe_ctx *pipe = &context->res_ctx.pipe_ctx[i]; in dcn_validate_bandwidth()
1117 struct pipe_ctx *hsplit_pipe = pipe->bottom_pipe; in dcn_validate_bandwidth()

12