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Searched refs:pin (Results 1 – 25 of 1586) sorted by relevance

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/Linux-v4.19/drivers/media/cec/
Dcec-pin.c111 static void cec_pin_update(struct cec_pin *pin, bool v, bool force) in cec_pin_update() argument
113 if (!force && v == pin->adap->cec_pin_is_high) in cec_pin_update()
116 pin->adap->cec_pin_is_high = v; in cec_pin_update()
117 if (atomic_read(&pin->work_pin_num_events) < CEC_NUM_PIN_EVENTS) { in cec_pin_update()
120 if (pin->work_pin_events_dropped) { in cec_pin_update()
121 pin->work_pin_events_dropped = false; in cec_pin_update()
124 pin->work_pin_events[pin->work_pin_events_wr] = ev; in cec_pin_update()
125 pin->work_pin_ts[pin->work_pin_events_wr] = ktime_get(); in cec_pin_update()
126 pin->work_pin_events_wr = in cec_pin_update()
127 (pin->work_pin_events_wr + 1) % CEC_NUM_PIN_EVENTS; in cec_pin_update()
[all …]
Dcec-pin-error-inj.c49 u16 cec_pin_rx_error_inj(struct cec_pin *pin) in cec_pin_rx_error_inj() argument
54 if (!(pin->error_inj[cmd] & CEC_ERROR_INJ_RX_MASK) && in cec_pin_rx_error_inj()
55 pin->rx_bit >= 18) in cec_pin_rx_error_inj()
56 cmd = pin->rx_msg.msg[1]; in cec_pin_rx_error_inj()
57 return (pin->error_inj[cmd] & CEC_ERROR_INJ_RX_MASK) ? cmd : in cec_pin_rx_error_inj()
61 u16 cec_pin_tx_error_inj(struct cec_pin *pin) in cec_pin_tx_error_inj() argument
65 if (!(pin->error_inj[cmd] & CEC_ERROR_INJ_TX_MASK) && in cec_pin_tx_error_inj()
66 pin->tx_msg.len > 1) in cec_pin_tx_error_inj()
67 cmd = pin->tx_msg.msg[1]; in cec_pin_tx_error_inj()
68 return (pin->error_inj[cmd] & CEC_ERROR_INJ_TX_MASK) ? cmd : in cec_pin_tx_error_inj()
[all …]
/Linux-v4.19/arch/mips/include/asm/mach-pnx833x/
Dgpio.h56 static inline void pnx833x_gpio_select_input(unsigned int pin) in pnx833x_gpio_select_input() argument
58 if (pin < 32) in pnx833x_gpio_select_input()
59 CLEAR_REG_BIT(PNX833X_PIO_DIR, pin); in pnx833x_gpio_select_input()
61 CLEAR_REG_BIT(PNX833X_PIO_DIR2, pin & 31); in pnx833x_gpio_select_input()
63 static inline void pnx833x_gpio_select_output(unsigned int pin) in pnx833x_gpio_select_output() argument
65 if (pin < 32) in pnx833x_gpio_select_output()
66 SET_REG_BIT(PNX833X_PIO_DIR, pin); in pnx833x_gpio_select_output()
68 SET_REG_BIT(PNX833X_PIO_DIR2, pin & 31); in pnx833x_gpio_select_output()
72 static inline void pnx833x_gpio_select_function_io(unsigned int pin) in pnx833x_gpio_select_function_io() argument
74 if (pin < 32) in pnx833x_gpio_select_function_io()
[all …]
/Linux-v4.19/drivers/pinctrl/
Dpinctrl-rza1.c85 u8 pin: 4; member
102 u16 pin: 4; member
129 { .pin = 0, .func = 1 },
130 { .pin = 1, .func = 1 },
131 { .pin = 2, .func = 1 },
132 { .pin = 3, .func = 1 },
133 { .pin = 4, .func = 1 },
134 { .pin = 5, .func = 1 },
135 { .pin = 6, .func = 1 },
136 { .pin = 7, .func = 1 },
[all …]
/Linux-v4.19/arch/arm/boot/dts/
Dsama5d3_lcd.dtsi61 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
62 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
63 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
64 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
65 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
66 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
67 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
68 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
69 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
70 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
Dexynos4412-pinctrl.dtsi3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
[all …]
Ds5pv210-pinctrl.dtsi274 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
275 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
276 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
281 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
282 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
283 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
288 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
289 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
290 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
295 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
[all …]
Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
185 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
186 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
187 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
192 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
193 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
194 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
199 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
200 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
25 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
26 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
27 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
33 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
34 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
[all …]
Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
136 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
142 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
148 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
Dat91sam9x5_lcd.dtsi61 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
62 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
63 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
64 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
65 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
66 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
67 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
68 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
69 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
70 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
Dexynos5410-pinctrl.dtsi3 * Exynos5410 SoC pin-mux and pin-config device tree source
282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
[all …]
/Linux-v4.19/drivers/pinctrl/qcom/
Dpinctrl-ssbi-mpp.c173 struct pm8xxx_pin_data *pin) in pm8xxx_mpp_update() argument
181 switch (pin->mode) { in pm8xxx_mpp_update()
183 if (pin->dtest) { in pm8xxx_mpp_update()
185 ctrl = pin->dtest - 1; in pm8xxx_mpp_update()
186 } else if (pin->input && pin->output) { in pm8xxx_mpp_update()
188 if (pin->high_z) in pm8xxx_mpp_update()
190 else if (pin->pullup == 600) in pm8xxx_mpp_update()
192 else if (pin->pullup == 10000) in pm8xxx_mpp_update()
196 } else if (pin->input) { in pm8xxx_mpp_update()
198 if (pin->dtest) in pm8xxx_mpp_update()
[all …]
Dpinctrl-ssbi-gpio.c134 struct pm8xxx_pin_data *pin, int bank) in pm8xxx_read_bank() argument
139 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_read_bank()
145 ret = regmap_read(pctrl->regmap, pin->reg, &val); in pm8xxx_read_bank()
155 struct pm8xxx_pin_data *pin, in pm8xxx_write_bank() argument
164 ret = regmap_write(pctrl->regmap, pin->reg, val); in pm8xxx_write_bank()
234 struct pm8xxx_pin_data *pin = pctrl->desc.pins[group].drv_data; in pm8xxx_pinmux_set_mux() local
237 pin->function = function; in pm8xxx_pinmux_set_mux()
238 val = pin->function << 1; in pm8xxx_pinmux_set_mux()
240 pm8xxx_write_bank(pctrl, pin, 4, val); in pm8xxx_pinmux_set_mux()
257 struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; in pm8xxx_pin_config_get() local
[all …]
/Linux-v4.19/arch/arm64/boot/dts/exynos/
Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
134 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
136 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
141 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
142 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
/Linux-v4.19/arch/arm/mach-orion5x/
Dboard-rd88f5182.c42 int pin; in rd88f5182_pci_preinit() local
47 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; in rd88f5182_pci_preinit()
48 if (gpio_request(pin, "PCI IntA") == 0) { in rd88f5182_pci_preinit()
49 if (gpio_direction_input(pin) == 0) { in rd88f5182_pci_preinit()
50 irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); in rd88f5182_pci_preinit()
53 "set_irq_type pin %d\n", pin); in rd88f5182_pci_preinit()
54 gpio_free(pin); in rd88f5182_pci_preinit()
57 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); in rd88f5182_pci_preinit()
60 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; in rd88f5182_pci_preinit()
61 if (gpio_request(pin, "PCI IntB") == 0) { in rd88f5182_pci_preinit()
[all …]
/Linux-v4.19/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.c62 unsigned long pin) in mtk_get_regmap() argument
64 if (pin >= pctl->devdata->type1_start && pin < pctl->devdata->type1_end) in mtk_get_regmap()
69 static unsigned int mtk_get_port(struct mtk_pinctrl *pctl, unsigned long pin) in mtk_get_port() argument
72 return ((pin >> 4) & pctl->devdata->port_mask) in mtk_get_port()
117 static int mtk_pconf_set_ies_smt(struct mtk_pinctrl *pctl, unsigned pin, in mtk_pconf_set_ies_smt() argument
142 return pctl->devdata->spec_ies_smt_set(mtk_get_regmap(pctl, pin), in mtk_pconf_set_ies_smt()
143 pin, pctl->devdata->port_align, value, arg); in mtk_pconf_set_ies_smt()
146 bit = BIT(pin & 0xf); in mtk_pconf_set_ies_smt()
154 reg_addr = SET_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt()
156 reg_addr = CLR_ADDR(mtk_get_port(pctl, pin) + offset, pctl); in mtk_pconf_set_ies_smt()
[all …]
/Linux-v4.19/arch/arm/mach-imx/
Diomux-v1.c61 unsigned int port, unsigned int pin, int on) in imx_iomuxv1_set_puen() argument
63 unsigned long mask = 1 << pin; in imx_iomuxv1_set_puen()
69 unsigned int port, unsigned int pin, int out) in imx_iomuxv1_set_ddir() argument
71 unsigned long mask = 1 << pin; in imx_iomuxv1_set_ddir()
77 unsigned int port, unsigned int pin, int af) in imx_iomuxv1_set_gpr() argument
79 unsigned long mask = 1 << pin; in imx_iomuxv1_set_gpr()
85 unsigned int port, unsigned int pin, int inuse) in imx_iomuxv1_set_gius() argument
87 unsigned long mask = 1 << pin; in imx_iomuxv1_set_gius()
93 unsigned int port, unsigned int pin, unsigned int ocr) in imx_iomuxv1_set_ocr() argument
95 unsigned long shift = (pin & 0xf) << 1; in imx_iomuxv1_set_ocr()
[all …]
/Linux-v4.19/arch/arm/mach-s3c24xx/
Dpm.c64 static void s3c_pm_check_resume_pin(unsigned int pin, unsigned int irqoffs) in s3c_pm_check_resume_pin() argument
68 int irq = gpio_to_irq(pin); in s3c_pm_check_resume_pin()
75 pinstate = s3c_gpio_getcfg(pin); in s3c_pm_check_resume_pin()
79 S3C_PMDBG("Leaving IRQ %d (pin %d) as is\n", irq, pin); in s3c_pm_check_resume_pin()
82 S3C_PMDBG("Disabling IRQ %d (pin %d)\n", irq, pin); in s3c_pm_check_resume_pin()
83 s3c_gpio_cfgpin(pin, S3C2410_GPIO_INPUT); in s3c_pm_check_resume_pin()
95 int pin; in s3c_pm_configure_extint() local
102 for (pin = S3C2410_GPF(0); pin <= S3C2410_GPF(7); pin++) { in s3c_pm_configure_extint()
103 s3c_pm_check_resume_pin(pin, pin - S3C2410_GPF(0)); in s3c_pm_configure_extint()
106 for (pin = S3C2410_GPG(0); pin <= S3C2410_GPG(7); pin++) { in s3c_pm_configure_extint()
[all …]
/Linux-v4.19/drivers/gpio/
Dgpio-lpc32xx.c180 unsigned pin, int input) in __set_gpio_dir_p012() argument
183 __raw_writel(GPIO012_PIN_TO_BIT(pin), in __set_gpio_dir_p012()
186 __raw_writel(GPIO012_PIN_TO_BIT(pin), in __set_gpio_dir_p012()
191 unsigned pin, int input) in __set_gpio_dir_p3() argument
193 u32 u = GPIO3_PIN_TO_BIT(pin); in __set_gpio_dir_p3()
202 unsigned pin, int high) in __set_gpio_level_p012() argument
205 __raw_writel(GPIO012_PIN_TO_BIT(pin), in __set_gpio_level_p012()
208 __raw_writel(GPIO012_PIN_TO_BIT(pin), in __set_gpio_level_p012()
213 unsigned pin, int high) in __set_gpio_level_p3() argument
215 u32 u = GPIO3_PIN_TO_BIT(pin); in __set_gpio_level_p3()
[all …]
Dgpio-zevio.c63 static inline u32 zevio_gpio_port_get(struct zevio_gpio *c, unsigned pin, in zevio_gpio_port_get() argument
66 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE; in zevio_gpio_port_get()
70 static inline void zevio_gpio_port_set(struct zevio_gpio *c, unsigned pin, in zevio_gpio_port_set() argument
73 unsigned section_offset = ((pin >> 3) & 3)*ZEVIO_GPIO_SECTION_SIZE; in zevio_gpio_port_set()
78 static int zevio_gpio_get(struct gpio_chip *chip, unsigned pin) in zevio_gpio_get() argument
84 dir = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_DIRECTION); in zevio_gpio_get()
85 if (dir & BIT(ZEVIO_GPIO_BIT(pin))) in zevio_gpio_get()
86 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_INPUT); in zevio_gpio_get()
88 val = zevio_gpio_port_get(controller, pin, ZEVIO_GPIO_OUTPUT); in zevio_gpio_get()
91 return (val >> ZEVIO_GPIO_BIT(pin)) & 0x1; in zevio_gpio_get()
[all …]

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