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Searched refs:phy_write_mmd (Results 1 – 14 of 14) sorted by relevance

/Linux-v4.19/drivers/net/phy/
Ddp83822.c113 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA1, in dp83822_set_wol()
115 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA2, in dp83822_set_wol()
117 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_DA3, in dp83822_set_wol()
128 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
131 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
134 phy_write_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol()
144 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, in dp83822_set_wol()
150 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, in dp83822_set_wol()
272 return phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, in dp83822_config_init()
309 phy_write_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG, value | in dp83822_resume()
Ddp83tc811.c113 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA1, in dp83811_set_wol()
115 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA2, in dp83811_set_wol()
117 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_DA3, in dp83811_set_wol()
128 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
131 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
134 phy_write_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol()
144 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_set_wol()
150 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_set_wol()
302 return phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, in dp83811_config_init()
337 phy_write_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG, value | in dp83811_resume()
Daquantia.c46 err = phy_write_mmd(phydev, MDIO_MMD_AN, 0xd401, 1); in aquantia_config_intr()
50 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xff00, 1); in aquantia_config_intr()
54 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xff01, 0x1001); in aquantia_config_intr()
56 err = phy_write_mmd(phydev, MDIO_MMD_AN, 0xd401, 0); in aquantia_config_intr()
60 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xff00, 0); in aquantia_config_intr()
64 err = phy_write_mmd(phydev, MDIO_MMD_VEND1, 0xff01, 0); in aquantia_config_intr()
Dintel-xway.c171 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCH, in xway_gphy_config_init()
175 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LEDCL, in xway_gphy_config_init()
188 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0H, ledxh); in xway_gphy_config_init()
189 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED0L, ledxl); in xway_gphy_config_init()
190 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1H, ledxh); in xway_gphy_config_init()
191 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED1L, ledxl); in xway_gphy_config_init()
192 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2H, ledxh); in xway_gphy_config_init()
193 phy_write_mmd(phydev, MDIO_MMD_VEND2, XWAY_MMD_LED2L, ledxl); in xway_gphy_config_init()
Ddp83867.c147 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val); in dp83867_config_port_mirroring()
236 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_CFG4, val); in dp83867_config_init()
278 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL, val); in dp83867_config_init()
283 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL, in dp83867_config_init()
294 phy_write_mmd(phydev, DP83867_DEVADDR, in dp83867_config_init()
314 phy_write_mmd(phydev, DP83867_DEVADDR, DP83867_IO_MUX_CFG, val); in dp83867_config_init()
Dphy-c45.c59 ret = phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1, ctrl1); in genphy_c45_pma_setup_forced()
63 return phy_write_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2, ctrl2); in genphy_c45_pma_setup_forced()
86 return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val); in genphy_c45_an_disable_aneg()
108 return phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1, val); in genphy_c45_restart_aneg()
Dbcm-phy-lib.c213 phy_write_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL, (u32)val); in bcm_phy_set_eee()
225 phy_write_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV, (u32)val); in bcm_phy_set_eee()
Dphy-core.c296 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val) in phy_write_mmd() function
325 EXPORT_SYMBOL(phy_write_mmd);
Dmarvell10g.c73 ret = phy_write_mmd(phydev, devad, reg, val); in mv3310_modify()
155 ret = phy_write_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP, in mv3310_hwmon_config()
Dmicrochip.c325 phy_write_mmd(phydev, MDIO_MMD_PCS, PHY_ARDENNES_MMD_DEV_3_PHY_CFG, in lan88xx_config_init()
Dphy.c1206 phy_write_mmd(phydev, MDIO_MMD_PCS, MDIO_CTRL1, val); in phy_init_eee()
1298 ret = phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); in phy_ethtool_set_eee()
Dphy_device.c1390 phy_write_mmd(phydev, MDIO_MMD_AN, MDIO_AN_EEE_ADV, adv); in genphy_config_eee_advert()
/Linux-v4.19/include/linux/
Dphy.h901 int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
/Linux-v4.19/drivers/net/usb/
Dlan78xx.c2024 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf); in lan8835_fixup()
2044 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077); in ksz9031rnx_fixup()
2046 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777); in ksz9031rnx_fixup()
2048 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF); in ksz9031rnx_fixup()