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Searched refs:phy_read (Results 1 – 25 of 81) sorted by relevance

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/Linux-v4.19/drivers/net/ethernet/ibm/emac/
Dphy.c31 #define phy_read _phy_read macro
59 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
67 val = phy_read(phy, MII_BMCR); in emac_mii_reset_phy()
119 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
128 adv = phy_read(phy, MII_ADVERTISE); in genmii_setup_aneg()
149 adv = phy_read(phy, MII_CTRL1000); in genmii_setup_aneg()
161 ctl = phy_read(phy, MII_BMCR); in genmii_setup_aneg()
177 ctl = phy_read(phy, MII_BMCR); in genmii_setup_forced()
210 phy_read(phy, MII_BMSR); in genmii_poll_link()
211 status = phy_read(phy, MII_BMSR); in genmii_poll_link()
[all …]
/Linux-v4.19/drivers/net/phy/
Dat803x.c93 return phy_read(phydev, AT803X_DEBUG_DATA); in at803x_debug_reg_read()
129 context->bmcr = phy_read(phydev, MII_BMCR); in at803x_context_save()
130 context->advertise = phy_read(phydev, MII_ADVERTISE); in at803x_context_save()
131 context->control1000 = phy_read(phydev, MII_CTRL1000); in at803x_context_save()
132 context->int_enable = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_context_save()
133 context->smart_speed = phy_read(phydev, AT803X_SMART_SPEED); in at803x_context_save()
134 context->led_control = phy_read(phydev, AT803X_LED_CONTROL); in at803x_context_save()
182 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
187 value = phy_read(phydev, AT803X_INTR_STATUS); in at803x_set_wol()
189 value = phy_read(phydev, AT803X_INTR_ENABLE); in at803x_set_wol()
[all …]
Dlxt.c68 err = phy_read(phydev, MII_BMSR); in lxt970_ack_interrupt()
73 err = phy_read(phydev, MII_LXT970_ISR); in lxt970_ack_interrupt()
97 int err = phy_read(phydev, MII_LXT971_ISR); in lxt971_ack_interrupt()
125 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link()
130 control = phy_read(phydev, MII_BMCR); in lxt973a2_update_link()
136 status = phy_read(phydev, MII_BMSR); in lxt973a2_update_link()
164 adv = phy_read(phydev, MII_ADVERTISE); in lxt973a2_read_status()
170 lpa = phy_read(phydev, MII_LPA); in lxt973a2_read_status()
203 int bmcr = phy_read(phydev, MII_BMCR); in lxt973a2_read_status()
229 int val = phy_read(phydev, MII_LXT973_PCR); in lxt973_probe()
[all …]
Dmscc.c142 reg_val = phy_read(phydev, MSCC_PHY_LED_MODE_SEL); in vsc85xx_led_cntl_set()
161 reg_val = phy_read(phydev, MSCC_PHY_DEV_AUX_CNTL); in vsc85xx_mdix_get()
175 reg_val = phy_read(phydev, MSCC_PHY_BYPASS_CONTROL); in vsc85xx_mdix_set()
193 reg_val = phy_read(phydev, MSCC_PHY_EXT_MODE_CNTL); in vsc85xx_mdix_set()
219 reg_val = phy_read(phydev, MSCC_PHY_ACTIPHY_CNTL); in vsc85xx_downshift_get()
251 reg_val = phy_read(phydev, MSCC_PHY_ACTIPHY_CNTL); in vsc85xx_downshift_set()
306 reg_val = phy_read(phydev, MSCC_PHY_WOL_MAC_CONTROL); in vsc85xx_wol_set()
319 reg_val = phy_read(phydev, MII_VSC85XX_INT_MASK); in vsc85xx_wol_set()
326 reg_val = phy_read(phydev, MII_VSC85XX_INT_MASK); in vsc85xx_wol_set()
333 reg_val = phy_read(phydev, MII_VSC85XX_INT_STATUS); in vsc85xx_wol_set()
[all …]
Dbcm87xx.c64 val = phy_read(phydev, regnum); in bcm87xx_of_reg_init()
110 rx_signal_detect = phy_read(phydev, BCM87XX_PMD_RX_SIGNAL_DETECT); in bcm87xx_read_status()
117 pcs_status = phy_read(phydev, BCM87XX_10GBASER_PCS_STATUS); in bcm87xx_read_status()
124 xgxs_lane_status = phy_read(phydev, BCM87XX_XGXS_LANE_STATUS); in bcm87xx_read_status()
145 reg = phy_read(phydev, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr()
163 reg = phy_read(phydev, BCM87XX_LASI_STATUS); in bcm87xx_did_interrupt()
Dicplus.c108 bmcr = phy_read(phydev, MII_BMCR); in ip1xx_reset()
117 bmcr = phy_read(phydev, MII_BMCR); in ip1xx_reset()
134 c = phy_read(phydev, IP1001_SPEC_CTRL_STATUS_2); in ip1001_config_init()
144 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); in ip1001_config_init()
179 c = phy_read(phydev, IP10XX_SPEC_CTRL_STATUS); in ip101a_g_config_init()
206 int err = phy_read(phydev, IP101A_G_IRQ_CONF_STATUS); in ip101a_g_ack_interrupt()
Dste10Xp.c40 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init()
50 value = phy_read(phydev, MII_BMCR); in ste10Xp_config_init()
65 value = phy_read(phydev, MII_XCIIS); in ste10Xp_config_intr()
77 int err = phy_read(phydev, MII_XCIIS); in ste10Xp_ack_interrupt()
Dsmsc.c54 int rc = phy_read (phydev, MII_LAN83C185_ISF); in smsc_phy_ack_interrupt()
63 int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in smsc_phy_config_init()
81 int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES); in smsc_phy_reset()
122 int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
135 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
143 rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS); in lan87xx_read_status()
177 val = phy_read(phydev, stat.reg); in smsc_get_stat()
Ddp83tc811.c82 err = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_ack_interrupt()
86 err = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_ack_interrupt()
90 err = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_ack_interrupt()
200 misr_status = phy_read(phydev, MII_DP83811_INT_STAT1); in dp83811_config_intr()
217 misr_status = phy_read(phydev, MII_DP83811_INT_STAT2); in dp83811_config_intr()
232 misr_status = phy_read(phydev, MII_DP83811_INT_STAT3); in dp83811_config_intr()
262 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_aneg()
287 value = phy_read(phydev, MII_DP83811_SGMII_CTRL); in dp83811_config_init()
Dbcm-phy-lib.c45 val = phy_read(phydev, MII_BCM54XX_EXP_DATA); in bcm_phy_read_exp()
61 return phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm54xx_auxctl_read()
82 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_write_misc()
106 tmp = phy_read(phydev, MII_BCM54XX_AUX_CTL); in bcm_phy_read_misc()
124 reg = phy_read(phydev, MII_BCM54XX_ISR); in bcm_phy_ack_intr()
136 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm_phy_config_intr()
152 return MII_BCM54XX_SHD_DATA(phy_read(phydev, MII_BCM54XX_SHD)); in bcm_phy_read_shadow()
359 val = phy_read(phydev, stat.reg); in bcm_phy_get_stat()
Dqsemi.c83 err = phy_read(phydev, MII_QS6612_ISR); in qs6612_ack_interrupt()
88 err = phy_read(phydev, MII_BMSR); in qs6612_ack_interrupt()
93 err = phy_read(phydev, MII_EXPANSION); in qs6612_ack_interrupt()
Det1011c.c55 ctl = phy_read(phydev, MII_BMCR); in et1011c_config_aneg()
75 val = phy_read(phydev, ET1011C_STATUS_REG); in et1011c_read_status()
78 val = phy_read(phydev, ET1011C_CONFIG_REG); in et1011c_read_status()
DuPD60620.c45 phy_state = phy_read(phydev, MII_BMSR); in upd60620_read_status()
55 phy_state = phy_read(phydev, PHY_PHYSCR); in upd60620_read_status()
69 phy_state = phy_read(phydev, MII_LPA); in upd60620_read_status()
Ddp83822.c86 err = phy_read(phydev, MII_DP83822_MISR1); in dp83822_ack_interrupt()
90 err = phy_read(phydev, MII_DP83822_MISR2); in dp83822_ack_interrupt()
202 misr_status = phy_read(phydev, MII_DP83822_MISR1); in dp83822_config_intr()
219 misr_status = phy_read(phydev, MII_DP83822_MISR2); in dp83822_config_intr()
236 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
251 physcr_status = phy_read(phydev, MII_DP83822_PHYSCR); in dp83822_config_intr()
Drockchip.c99 val = phy_read(phydev, MII_INTERNAL_CTRL_STATUS); in rockchip_integrated_phy_config_init()
115 int reg = phy_read(phydev, MII_SPECIAL_CONTROL_STATUS); in rockchip_link_change_notify()
127 int bmcr = phy_read(phydev, MII_BMCR); in rockchip_link_change_notify()
158 reg = phy_read(phydev, MII_INTERNAL_CTRL_STATUS); in rockchip_set_polarity()
Dmicrel.c146 return phy_read(phydev, MII_KSZPHY_EXTREG_READ); in kszphy_extended_read()
154 rc = phy_read(phydev, MII_KSZPHY_INTCS); in kszphy_ack_interrupt()
171 temp = phy_read(phydev, MII_KSZPHY_CTRL); in kszphy_config_intr()
190 ctrl = phy_read(phydev, MII_KSZPHY_CTRL); in kszphy_rmii_clk_sel()
217 temp = phy_read(phydev, reg); in kszphy_setup_led()
240 ret = phy_read(phydev, MII_KSZPHY_OMSO); in kszphy_broadcast_disable()
256 ret = phy_read(phydev, MII_KSZPHY_OMSO); in kszphy_nand_tree_disable()
459 return phy_read(phydev, MII_KSZ9031RN_MMD_REGDATA_REG); in ksz9031_extended_read()
593 result = phy_read(phydev, MII_CTRL1000); in ksz9031_config_init()
620 regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); in ksz8873mll_read_status()
[all …]
Ddp83848.c50 int err = phy_read(phydev, DP83848_MISR); in dp83848_ack_interrupt()
59 control = phy_read(phydev, DP83848_MICR); in dp83848_config_intr()
89 val = phy_read(phydev, MII_BMCR); in dp83848_config_init()
Dmeson-gxl.c98 ret = phy_read(phydev, TSTREAD1); in meson_gxl_read_reg()
184 lpa = phy_read(phydev, MII_LPA); in meson_gxl_read_status()
188 exp = phy_read(phydev, MII_EXPANSION); in meson_gxl_read_status()
206 int ret = phy_read(phydev, INTSRC_FLAG); in meson_gxl_ack_interrupt()
Dnational.c62 return phy_read(phydev, NS_EXP_MEM_DATA); in ns_exp_read()
86 int ret = phy_read(phydev, DP83865_INT_STATUS); in ns_ack_interrupt()
99 int bmcr = phy_read(phydev, MII_BMCR); in ns_giga_speed_fallback()
Damd.c36 err = phy_read(phydev, MII_BMSR); in am79c_ack_interrupt()
40 err = phy_read(phydev, MII_AM79C_IR); in am79c_ack_interrupt()
Dmicrochip_t1.c27 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr()
38 int rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_ack_interrupt()
Dbroadcom.c47 val = phy_read(phydev, MII_CTRL1000); in bcm54210e_config_init()
280 reg = phy_read(phydev, MII_BCM54XX_ECR); in bcm54xx_config_init()
449 val = phy_read(phydev, reg); in brcm_phy_setbits()
465 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_init()
481 brcmtest = phy_read(phydev, MII_BRCM_FET_BRCMTEST); in brcm_fet_config_init()
492 reg = phy_read(phydev, MII_BRCM_FET_SHDW_AUXMODE4); in brcm_fet_config_init()
531 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_ack_interrupt()
542 reg = phy_read(phydev, MII_BRCM_FET_INTREG); in brcm_fet_config_intr()
/Linux-v4.19/arch/powerpc/platforms/85xx/
Dmpc85xx_mds.c76 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
91 scr = phy_read(phydev, MV88E1111_SCR); in mpc8568_fixup_125_clock()
112 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
128 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
133 temp = phy_read(phydev, 30); in mpc8568_mds_phy_fixups()
146 temp = phy_read(phydev, 16); in mpc8568_mds_phy_fixups()
/Linux-v4.19/arch/arm/mach-imx/
Dmach-imx6q.c120 val = phy_read(dev, 0xe); in ar8031_phy_fixup()
127 val = phy_read(dev, 0x1e); in ar8031_phy_fixup()
147 val = phy_read(dev, 0xe); in ar8035_phy_fixup()
160 val = phy_read(dev, 0x0); in ar8035_phy_fixup()
Dmach-imx7d.c32 val = phy_read(dev, 0xe); in ar8031_phy_fixup()
38 val = phy_read(dev, 0x1e); in ar8031_phy_fixup()

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