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Searched refs:phases (Results 1 – 25 of 41) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/i915/
Di915_gem_evict.c130 struct list_head *phases[] = { in i915_gem_evict_something() local
174 phases[1] = NULL; in i915_gem_evict_something()
178 phase = phases; in i915_gem_evict_something()
392 struct list_head *phases[] = { in i915_gem_evict_vm() local
416 phase = phases; in i915_gem_evict_vm()
Di915_gem_shrinker.c154 } phases[] = { in i915_gem_shrink() local
211 for (phase = phases; phase->list; phase++) { in i915_gem_shrink()
Di915_gem.c5112 struct list_head *phases[] = { in i915_gem_suspend_late() local
5139 for (phase = phases; *phase; phase++) { in i915_gem_suspend_late()
5801 struct list_head *phases[] = { in i915_gem_freeze_late() local
5826 for (phase = phases; *phase; phase++) { in i915_gem_freeze_late()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dhwmgr_ppt.h41 uint8_t phases; member
68 uint8_t phases; member
Dsmu_helper.c649 dep_table->entries[i].phases = allowed_dep_table->entries[i].phases; in smu_get_voltage_dependency_table_ppt_v1()
/Linux-v4.19/Documentation/devicetree/bindings/mmc/
Drockchip-dw-mshc.txt30 to control the clock phases, "ciu-sample" is required for tuning high-
34 probing, low speeds or in case where all phases work at tuning time.
37 * rockchip,desired-num-phases: The desired number of times that the host
/Linux-v4.19/tools/power/pm-graph/
Dsleepgraph.py865 phases = [] # ordered list of phases variable in Data
891 self.phases = []
914 self.phases = self.sortedPhases()
916 for phase in self.phases:
959 for phase in self.phases:
976 for phase in self.phases:
1007 tgtdev = self.sourceDevice(self.phases, start, end, pid, 'device')
1014 tgtdev = self.sourceDevice(self.phases, start, end, pid, 'thread')
1056 for phase in self.phases:
1067 for phase in self.phases:
[all …]
Dbootgraph.py216 phases = ['kernel', 'user'] variable in Data
250 for p in data.phases:
274 for phase in self.phases:
377 for p in data.phases:
539 for p in data.phases:
550 for p in data.phases:
562 for phase in data.phases:
619 for phase in data.phases:
666 for p in data.phases:
/Linux-v4.19/drivers/nfc/pn544/
Dpn544.c347 u8 phases = 0; in pn544_hci_start_poll() local
378 phases |= 1; /* Type A */ in pn544_hci_start_poll()
380 phases |= (1 << 2); /* Type F 212 */ in pn544_hci_start_poll()
381 phases |= (1 << 3); /* Type F 424 */ in pn544_hci_start_poll()
384 phases |= (1 << 5); /* NFC active */ in pn544_hci_start_poll()
387 PN544_PL_RDPHASES, &phases, 1); in pn544_hci_start_poll()
/Linux-v4.19/Documentation/driver-api/pm/
Ddevices.rst136 they are called in phases for every device, respecting the parent-child
271 Suspending or resuming the system is done in several phases. Different phases
276 callbacks. The various phases always run after tasks have been frozen and
277 before they are unfrozen. Furthermore, the ``*_noirq`` phases run at a time
281 All phases use PM domain, bus, type, class or driver callbacks (that is, methods
318 the phases are: ``prepare``, ``suspend``, ``suspend_late``, ``suspend_noirq``.
325 suspend-related phases, during the ``prepare`` phase the device
344 ``suspend_noirq`` phases as well as all of the corresponding phases of
387 "quiesce device" and "save device state" phases, in which cases
404 At the end of these phases, drivers should have stopped all I/O transactions
[all …]
/Linux-v4.19/drivers/vfio/pci/
Dvfio_pci_config.c1194 int ret, evcc, phases, vc_arb; in vfio_vc_cap_len() local
1207 phases = 128; in vfio_vc_cap_len()
1209 phases = 64; in vfio_vc_cap_len()
1211 phases = 32; in vfio_vc_cap_len()
1213 phases = 0; in vfio_vc_cap_len()
1215 vc_arb = phases * 4; in vfio_vc_cap_len()
/Linux-v4.19/Documentation/power/
Dpci.txt422 callbacks for this purpose. They are executed in phases such that each phase
424 to the given subsystem before the next phase begins. These phases always run
430 be preserved, such as one of the ACPI sleep states S1-S3, the phases are:
434 The following PCI bus type's callbacks, respectively, are used in these phases:
498 S1-S3, into the working state (ACPI S0), the phases are:
503 phases:
550 to be free) in the following three phases:
561 The other two phases, however, are different.
579 back to the fully functional state and this is done in the following phases:
605 three phases:
[all …]
Dsuspend-and-interrupts.txt36 suspend-resume cycle, including the "noirq" phases of suspending and resuming
/Linux-v4.19/Documentation/crypto/
Dintro.rst57 following phases that are reflected in the API calls applicable to such
/Linux-v4.19/drivers/gpu/drm/i915/selftests/
Di915_vma.c611 } phases[] = { in igt_vma_partial() local
628 for (p = phases; p->name; p++) { /* exercise both create/lookup */ in igt_vma_partial()
Dintel_hangcheck.c876 } phases[] = { in igt_reset_engines() local
892 typeof(*phases) *p; in igt_reset_engines()
895 for (p = phases; p->name; p++) { in igt_reset_engines()
Di915_gem_gtt.c370 } phases[] = { in fill_hole() local
386 for (p = phases; p->name; p++) { in fill_hole()
/Linux-v4.19/drivers/scsi/
DNCR5380.c304 } phases[] = { variable
331 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && in NCR5380_print_phase()
332 (phases[i].value != (status & PHASE_MASK)); ++i) in NCR5380_print_phase()
334 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); in NCR5380_print_phase()
/Linux-v4.19/drivers/scsi/arm/
Dfas216.c252 static const char *phases[] = { in fas216_bus_phase() local
259 return phases[stat & STAT_BUSMASK]; in fas216_bus_phase()
264 static const char *phases[] = { in fas216_drv_phase() local
278 if (info->scsi.phase < ARRAY_SIZE(phases) && in fas216_drv_phase()
279 phases[info->scsi.phase]) in fas216_drv_phase()
280 return phases[info->scsi.phase]; in fas216_drv_phase()
/Linux-v4.19/Documentation/driver-model/
Doverview.txt67 The above abstraction prevents unnecessary pain during transitional phases.
/Linux-v4.19/Documentation/
Dmemory-hotplug.txt64 There are 2 phases in Memory Hotplug:
93 phases can be execute in seamless way.)
/Linux-v4.19/Documentation/devicetree/bindings/arm/
Didle-states.txt46 The following diagram depicts the CPU execution phases and related timing
59 Diagram 1: CPU idle state execution phases
/Linux-v4.19/drivers/scsi/aic7xxx/
Daic7xxx.seq475 * Now determine what phases the host wants us
599 * Data phases on the bus are from the
656 * Main loop for information transfer phases. Wait for the
921 * As a target, we control the phases,
1344 * For data-in phases, wait for any pending acks from the
1346 * send Ignore Wide Residue messages for data-in phases.
/Linux-v4.19/Documentation/filesystems/
Dsharedsubtree.txt896 The overall algorithm breaks the operation into 3 phases: (look at
900 2. commit phases.
901 3. abort phases.
/Linux-v4.19/Documentation/timers/
Dtimekeeping.txt40 the counter register is read in two phases on the bus lowest 16 bits first

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