Searched refs:pfit_control (Results 1 – 9 of 9) sorted by relevance
359 u32 pfit_control; in cdv_intel_lvds_mode_set() local374 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in cdv_intel_lvds_mode_set()378 pfit_control = 0; in cdv_intel_lvds_mode_set()380 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_lvds_mode_set()383 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in cdv_intel_lvds_mode_set()385 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_lvds_mode_set()
474 u32 pfit_control; in psb_intel_lvds_mode_set() local489 pfit_control = (PFIT_ENABLE | VERT_AUTO_SCALE | in psb_intel_lvds_mode_set()493 pfit_control = 0; in psb_intel_lvds_mode_set()496 pfit_control |= PANEL_8TO6_DITHER_ENABLE; in psb_intel_lvds_mode_set()498 REG_WRITE(PFIT_CONTROL, pfit_control); in psb_intel_lvds_mode_set()
354 u32 pfit_control; in oaktrail_panel_fitter_pipe() local356 pfit_control = REG_READ(PFIT_CONTROL); in oaktrail_panel_fitter_pipe()359 if ((pfit_control & PFIT_ENABLE) == 0) in oaktrail_panel_fitter_pipe()361 return (pfit_control >> 29) & 3; in oaktrail_panel_fitter_pipe()
91 u32 pfit_control; in psb_intel_panel_fitter_pipe() local93 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()96 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()
113 u32 pfit_control; in psb_intel_panel_fitter_pipe() local115 pfit_control = REG_READ(PFIT_CONTROL); in psb_intel_panel_fitter_pipe()118 if ((pfit_control & PFIT_ENABLE) == 0) in psb_intel_panel_fitter_pipe()122 return (pfit_control >> 29) & 0x3; in psb_intel_panel_fitter_pipe()
568 u32 pfit_control; in cdv_intel_panel_fitter_pipe() local570 pfit_control = REG_READ(PFIT_CONTROL); in cdv_intel_panel_fitter_pipe()573 if ((pfit_control & PFIT_ENABLE) == 0) in cdv_intel_panel_fitter_pipe()575 return (pfit_control >> 29) & 0x3; in cdv_intel_panel_fitter_pipe()
1091 uint32_t pfit_control; in cdv_intel_dp_mode_set() local1096 pfit_control = PFIT_ENABLE; in cdv_intel_dp_mode_set()1098 pfit_control = 0; in cdv_intel_dp_mode_set()1100 pfit_control |= gma_crtc->pipe << PFIT_PIPE_SHIFT; in cdv_intel_dp_mode_set()1102 REG_WRITE(PFIT_CONTROL, pfit_control); in cdv_intel_dp_mode_set()
228 u32 *pfit_control) in i965_scale_aspect() argument238 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()241 *pfit_control |= PFIT_ENABLE | in i965_scale_aspect()244 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; in i965_scale_aspect()248 u32 *pfit_control, u32 *pfit_pgm_ratios, in i9xx_scale_aspect() argument275 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()291 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()297 *pfit_control |= (PFIT_ENABLE | in i9xx_scale_aspect()309 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; in intel_gmch_panel_fitting() local330 i965_scale_aspect(pipe_config, &pfit_control); in intel_gmch_panel_fitting()[all …]
906 u32 pfit_control = I915_READ(PFIT_CONTROL); in update_pfit_vscale_ratio() local916 if (pfit_control & VERT_AUTO_SCALE) in update_pfit_vscale_ratio()
