Searched refs:performance_levels (Results 1 – 14 of 14) sorted by relevance
808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()815 ps->performance_levels[i].vddci = max_limits->vddci; in ni_apply_state_adjust_rules()823 ps->performance_levels[0].mclk = in ni_apply_state_adjust_rules()824 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()[all …]
2322 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2323 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()2342 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()2343 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()2349 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values()2358 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values()2417 if ((state->performance_levels[i].sclk >= rdev->pm.dpm.sq_ramping_threshold) && in si_populate_sq_ramping_values()3029 if (ps->performance_levels[i].vddc > ps->performance_levels[i+1].vddc) in si_apply_state_adjust_rules()3030 ps->performance_levels[i].vddc = ps->performance_levels[i+1].vddc; in si_apply_state_adjust_rules()3034 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()[all …]
829 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()830 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()831 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()832 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()839 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()840 sclk = ps->performance_levels[0].sclk; in ci_apply_state_adjust_rules()842 mclk = ps->performance_levels[0].mclk; in ci_apply_state_adjust_rules()843 sclk = ps->performance_levels[0].sclk; in ci_apply_state_adjust_rules()853 ps->performance_levels[0].sclk = sclk; in ci_apply_state_adjust_rules()854 ps->performance_levels[0].mclk = mclk; in ci_apply_state_adjust_rules()[all …]
175 struct rv7xx_pl performance_levels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member
49 struct ci_pl performance_levels[CISLANDS_MAX_HARDWARE_POWERLEVELS]; member
2912 if (smu7_ps->performance_levels[i].memory_clock > max_limits->mclk) in smu7_apply_state_adjust_rules()2913 smu7_ps->performance_levels[i].memory_clock = max_limits->mclk; in smu7_apply_state_adjust_rules()2914 if (smu7_ps->performance_levels[i].engine_clock > max_limits->sclk) in smu7_apply_state_adjust_rules()2915 smu7_ps->performance_levels[i].engine_clock = max_limits->sclk; in smu7_apply_state_adjust_rules()2958 sclk = smu7_ps->performance_levels[0].engine_clock; in smu7_apply_state_adjust_rules()2959 mclk = smu7_ps->performance_levels[0].memory_clock; in smu7_apply_state_adjust_rules()2962 mclk = smu7_ps->performance_levels in smu7_apply_state_adjust_rules()2973 smu7_ps->performance_levels[0].engine_clock = sclk; in smu7_apply_state_adjust_rules()2974 smu7_ps->performance_levels[0].memory_clock = mclk; in smu7_apply_state_adjust_rules()2976 smu7_ps->performance_levels[1].engine_clock = in smu7_apply_state_adjust_rules()[all …]
3021 performance_level = &(vega10_power_state->performance_levels in vega10_get_pp_table_entry_callback_func()3045 performance_level = &(vega10_power_state->performance_levels in vega10_get_pp_table_entry_callback_func()3132 if (vega10_ps->performance_levels[i].mem_clock > in vega10_apply_state_adjust_rules()3134 vega10_ps->performance_levels[i].mem_clock = in vega10_apply_state_adjust_rules()3136 if (vega10_ps->performance_levels[i].gfx_clock > in vega10_apply_state_adjust_rules()3138 vega10_ps->performance_levels[i].gfx_clock = in vega10_apply_state_adjust_rules()3193 sclk = vega10_ps->performance_levels[0].gfx_clock; in vega10_apply_state_adjust_rules()3194 mclk = vega10_ps->performance_levels[0].mem_clock; in vega10_apply_state_adjust_rules()3204 vega10_ps->performance_levels[0].gfx_clock = sclk; in vega10_apply_state_adjust_rules()3205 vega10_ps->performance_levels[0].mem_clock = mclk; in vega10_apply_state_adjust_rules()[all …]
85 struct smu7_performance_level performance_levels[SMU7_MAX_HARDWARE_POWERLEVELS]; member
112 struct vega10_performance_level performance_levels[VEGA10_MAX_HARDWARE_POWERLEVELS]; member
2420 prev_sclk = state->performance_levels[i-1].sclk; in si_populate_power_containment_values()2421 max_sclk = state->performance_levels[i].sclk; in si_populate_power_containment_values()2439 if (min_sclk < state->performance_levels[0].sclk) in si_populate_power_containment_values()2440 min_sclk = state->performance_levels[0].sclk; in si_populate_power_containment_values()2446 state->performance_levels[i-1].vddc, &vddc); in si_populate_power_containment_values()2455 state->performance_levels[i].vddc, &vddc); in si_populate_power_containment_values()2514 if ((state->performance_levels[i].sclk >= adev->pm.dpm.sq_ramping_threshold) && in si_populate_sq_ramping_values()3181 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3182 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3199 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()[all …]
961 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()962 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()963 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()964 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()971 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()972 sclk = ps->performance_levels[0].sclk; in ci_apply_state_adjust_rules()974 mclk = ps->performance_levels[0].mclk; in ci_apply_state_adjust_rules()975 sclk = ps->performance_levels[0].sclk; in ci_apply_state_adjust_rules()991 ps->performance_levels[0].sclk = sclk; in ci_apply_state_adjust_rules()992 ps->performance_levels[0].mclk = mclk; in ci_apply_state_adjust_rules()[all …]
50 struct ci_pl performance_levels[CISLANDS_MAX_HARDWARE_POWERLEVELS]; member
617 struct rv7xx_pl performance_levels[NISLANDS_MAX_SMC_PERFORMANCE_LEVELS_PER_SWSTATE]; member
152 const struct sabi_performance_level performance_levels[4]; member209 .performance_levels = {272 .performance_levels = {676 for (i = 0; config->performance_levels[i].name; ++i) { in get_performance_level()677 if (sretval.data[0] == config->performance_levels[i].value) in get_performance_level()678 return sprintf(buf, "%s\n", config->performance_levels[i].name); in get_performance_level()695 for (i = 0; config->performance_levels[i].name; ++i) { in set_performance_level()697 &config->performance_levels[i]; in set_performance_level()706 if (!config->performance_levels[i].name) in set_performance_level()1223 ok = !!samsung->config->performance_levels[0].name; in samsung_sysfs_is_visible()
