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Searched refs:per_ctx (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dscheduler.c502 (~PER_CTX_ADDR_MASK)) | wa_ctx->per_ctx.shadow_gma; in update_wa_ctx_2_shadow_ctx()
530 wa_ctx->per_ctx.shadow_gma = *((unsigned int *)per_ctx_va + 1); in prepare_shadow_wa_ctx()
1304 u32 head, tail, start, ctl, ctx_ctl, per_ctx, indirect_ctx; in intel_vgpu_create_workload() local
1358 RING_CTX_OFF(bb_per_ctx_ptr.val), &per_ctx, 4); in intel_vgpu_create_workload()
1367 workload->wa_ctx.per_ctx.guest_gma = in intel_vgpu_create_workload()
1368 per_ctx & PER_CTX_ADDR_MASK; in intel_vgpu_create_workload()
1369 workload->wa_ctx.per_ctx.valid = per_ctx & 1; in intel_vgpu_create_workload()
Dscheduler.h76 struct shadow_per_ctx per_ctx; member
Dcmd_parser.c2849 if (!wa_ctx->per_ctx.valid) in combine_wa_ctx()
2853 per_ctx_start[1] = wa_ctx->per_ctx.guest_gma; in combine_wa_ctx()
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_lrc.c1669 &wa_ctx->per_ctx }; in intel_init_workaround_bb()
2621 if (wa_ctx->per_ctx.size) { in execlists_init_reg_state()
2625 (ggtt_offset + wa_ctx->per_ctx.offset) | 0x01; in execlists_init_reg_state()
Dintel_ringbuffer.h164 } indirect_ctx, per_ctx; member