| /Linux-v4.19/drivers/clk/tegra/ |
| D | clk-tegra124.c | 146 { .pdiv = 1, .hw_val = 0 },
147 { .pdiv = 2, .hw_val = 1 },
148 { .pdiv = 3, .hw_val = 2 },
149 { .pdiv = 4, .hw_val = 3 },
150 { .pdiv = 5, .hw_val = 4 },
151 { .pdiv = 6, .hw_val = 5 },
152 { .pdiv = 8, .hw_val = 6 },
153 { .pdiv = 10, .hw_val = 7 },
154 { .pdiv = 12, .hw_val = 8 },
155 { .pdiv = 16, .hw_val = 9 },
[all …]
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| D | clk-tegra114.c | 160 { .pdiv = 1, .hw_val = 0 },
161 { .pdiv = 2, .hw_val = 1 },
162 { .pdiv = 3, .hw_val = 2 },
163 { .pdiv = 4, .hw_val = 3 },
164 { .pdiv = 5, .hw_val = 4 },
165 { .pdiv = 6, .hw_val = 5 },
166 { .pdiv = 8, .hw_val = 6 },
167 { .pdiv = 10, .hw_val = 7 },
168 { .pdiv = 12, .hw_val = 8 },
169 { .pdiv = 16, .hw_val = 9 },
[all …]
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| D | clk-tegra210.c | 1393 pllx->params->pdiv_tohw[cfg->p].pdiv / 1000); in tegra210_pllx_dyn_ramp()
1414 u32 pdiv; in tegra210_pll_fixed_mdiv_cfg() local
1421 p = params->round_p_to_pdiv(p, &pdiv); in tegra210_pll_fixed_mdiv_cfg()
1508 { .pdiv = 1, .hw_val = 0 },
1509 { .pdiv = 2, .hw_val = 1 },
1510 { .pdiv = 3, .hw_val = 2 },
1511 { .pdiv = 4, .hw_val = 3 },
1512 { .pdiv = 5, .hw_val = 4 },
1513 { .pdiv = 6, .hw_val = 5 },
1514 { .pdiv = 8, .hw_val = 6 },
[all …]
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| /Linux-v4.19/drivers/clk/samsung/ |
| D | clk-pll.c | 111 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll2126_recalc_rate() local
116 pdiv = (pll_con >> PLL2126_PDIV_SHIFT) & PLL2126_PDIV_MASK; in samsung_pll2126_recalc_rate()
120 do_div(fvco, (pdiv + 2) << sdiv); in samsung_pll2126_recalc_rate()
144 u32 pll_con, mdiv, pdiv, sdiv; in samsung_pll3000_recalc_rate() local
149 pdiv = (pll_con >> PLL3000_PDIV_SHIFT) & PLL3000_PDIV_MASK; in samsung_pll3000_recalc_rate()
153 do_div(fvco, pdiv << sdiv); in samsung_pll3000_recalc_rate()
181 u32 mdiv, pdiv, sdiv, pll_con; in samsung_pll35xx_recalc_rate() local
186 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK; in samsung_pll35xx_recalc_rate()
190 do_div(fvco, (pdiv << sdiv)); in samsung_pll35xx_recalc_rate()
203 return (rate->mdiv != old_mdiv || rate->pdiv != old_pdiv); in samsung_pll35xx_mp_change()
[all …]
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| D | clk-pll.h | 54 .pdiv = (_p), \
63 .pdiv = (_p), \
72 .pdiv = (_p), \
81 .pdiv = (_p), \
91 .pdiv = (_p), \
101 .pdiv = (_p), \
112 .pdiv = (_p), \
124 unsigned int pdiv; member
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| /Linux-v4.19/arch/arm/mach-s3c24xx/include/mach/ |
| D | regs-s3c2443-clock.h | 150 unsigned int mdiv, pdiv, sdiv; in s3c2443_get_mpll() local
154 pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; in s3c2443_get_mpll()
158 pdiv &= S3C2443_PLLCON_PDIVMASK; in s3c2443_get_mpll()
162 do_div(fvco, pdiv << sdiv); in s3c2443_get_mpll()
170 unsigned int mdiv, pdiv, sdiv; in s3c2443_get_epll() local
174 pdiv = pllval >> S3C2443_PLLCON_PDIVSHIFT; in s3c2443_get_epll()
178 pdiv &= S3C2443_PLLCON_PDIVMASK; in s3c2443_get_epll()
182 do_div(fvco, (pdiv + 2) << sdiv); in s3c2443_get_epll()
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| /Linux-v4.19/drivers/cpufreq/ |
| D | s3c2412-cpufreq.c | 45 unsigned int hdiv, pdiv, armdiv, dvs; in s3c2412_cpufreq_calcdivs() local
93 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2412_cpufreq_calcdivs()
95 if ((hclk / pdiv) > cfg->max.pclk) in s3c2412_cpufreq_calcdivs()
96 pdiv++; in s3c2412_cpufreq_calcdivs()
98 cfg->freq.pclk = hclk / pdiv; in s3c2412_cpufreq_calcdivs()
100 s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv); in s3c2412_cpufreq_calcdivs()
102 if (pdiv > 2) in s3c2412_cpufreq_calcdivs()
105 pdiv *= hdiv; in s3c2412_cpufreq_calcdivs()
110 cfg->divs.p_divisor = pdiv * armdiv; in s3c2412_cpufreq_calcdivs()
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| D | s3c2440-cpufreq.c | 59 unsigned int hdiv, pdiv; in s3c2440_cpufreq_calcdivs() local
93 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2440_cpufreq_calcdivs()
95 if ((hclk / pdiv) > cfg->max.pclk) in s3c2440_cpufreq_calcdivs()
96 pdiv++; in s3c2440_cpufreq_calcdivs()
98 s3c_freq_dbg("%s: pdiv %d\n", __func__, pdiv); in s3c2440_cpufreq_calcdivs()
100 if (pdiv > 2) in s3c2440_cpufreq_calcdivs()
103 pdiv *= hdiv; in s3c2440_cpufreq_calcdivs()
124 cfg->divs.p_divisor = pdiv; in s3c2440_cpufreq_calcdivs()
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| D | s3c2410-cpufreq.c | 49 unsigned int hdiv, pdiv; in s3c2410_cpufreq_calcdivs() local
68 pdiv = (hclk > cfg->max.pclk) ? 2 : 1; in s3c2410_cpufreq_calcdivs()
69 pclk = hclk / pdiv; in s3c2410_cpufreq_calcdivs()
76 pdiv *= hdiv; in s3c2410_cpufreq_calcdivs()
79 cfg->divs.p_divisor = pdiv; in s3c2410_cpufreq_calcdivs()
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| D | brcmstb-avs-cpufreq.c | 318 static void brcm_avs_parse_p1(u32 p1, unsigned int *mdiv_p0, unsigned int *pdiv, in brcm_avs_parse_p1() argument
322 *pdiv = (p1 >> PDIV_SHIFT) & PDIV_MASK; in brcm_avs_parse_p1()
638 unsigned int ndiv, pdiv; in show_brcm_avs_pmap() local
644 brcm_avs_parse_p1(pmap.p1, &mdiv_p0, &pdiv, &ndiv); in show_brcm_avs_pmap()
648 pmap.p1, pmap.p2, ndiv, pdiv, mdiv_p0, mdiv_p1, mdiv_p2, in show_brcm_avs_pmap()
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| /Linux-v4.19/drivers/clk/ |
| D | clk-cdce925.c | 67 u16 pdiv; /* 1..127 for Y2-Y9; 1..1023 for Y1 */ member
288 static void cdce925_clk_set_pdiv(struct clk_cdce925_output *data, u16 pdiv) in cdce925_clk_set_pdiv() argument
294 0x03, (pdiv >> 8) & 0x03); in cdce925_clk_set_pdiv()
295 regmap_write(data->chip->regmap, 0x03, pdiv & 0xFF); in cdce925_clk_set_pdiv()
298 regmap_update_bits(data->chip->regmap, 0x16, 0x7F, pdiv); in cdce925_clk_set_pdiv()
301 regmap_update_bits(data->chip->regmap, 0x17, 0x7F, pdiv); in cdce925_clk_set_pdiv()
304 regmap_update_bits(data->chip->regmap, 0x26, 0x7F, pdiv); in cdce925_clk_set_pdiv()
307 regmap_update_bits(data->chip->regmap, 0x27, 0x7F, pdiv); in cdce925_clk_set_pdiv()
310 regmap_update_bits(data->chip->regmap, 0x36, 0x7F, pdiv); in cdce925_clk_set_pdiv()
313 regmap_update_bits(data->chip->regmap, 0x37, 0x7F, pdiv); in cdce925_clk_set_pdiv()
[all …]
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| /Linux-v4.19/drivers/clk/bcm/ |
| D | clk-iproc-pll.c | 114 vco_out->pdiv = 1; in pll_calc_param()
292 unsigned int pdiv; in pll_fractional_change_only() local
306 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_fractional_change_only()
307 pdiv = (val >> ctrl->pdiv.shift) & bit_mask(ctrl->pdiv.width); in pll_fractional_change_only()
309 if (pdiv != vco->pdiv) in pll_fractional_change_only()
331 if (vco->pdiv == 0) in pll_set_rate()
334 ref_freq = parent_rate / vco->pdiv; in pll_set_rate()
421 val = readl(pll->control_base + ctrl->pdiv.offset); in pll_set_rate()
422 val &= ~(bit_mask(ctrl->pdiv.width) << ctrl->pdiv.shift); in pll_set_rate()
423 val |= vco->pdiv << ctrl->pdiv.shift; in pll_set_rate()
[all …]
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| D | clk-iproc-armpll.c | 202 unsigned int pdiv; in iproc_arm_pll_recalc_rate() local
218 pdiv = (val >> IPROC_CLK_PLLARMA_PDIV_SHIFT) & in iproc_arm_pll_recalc_rate()
220 if (pdiv == 0) in iproc_arm_pll_recalc_rate()
221 pdiv = 16; in iproc_arm_pll_recalc_rate()
230 pll->rate = (pll->rate / pdiv) / mdiv; in iproc_arm_pll_recalc_rate()
235 (unsigned int)(ndiv >> 20), pdiv, mdiv); in iproc_arm_pll_recalc_rate()
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| D | clk-sr.c | 54 .pdiv = REG_VAL(0x14, 0, 4),
114 .pdiv = REG_VAL(0x14, 0, 4),
173 .pdiv = REG_VAL(0x14, 0, 4),
208 .pdiv = REG_VAL(0x14, 0, 4),
262 .pdiv = REG_VAL(0x14, 0, 4),
298 .pdiv = REG_VAL(0x4, 26, 4),
343 .pdiv = REG_VAL(0x4, 26, 4),
382 .pdiv = REG_VAL(0x4, 26, 4),
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| D | clk-ns2.c | 47 .pdiv = REG_VAL(0x8, 0, 4),
110 .pdiv = REG_VAL(0x8, 0, 4),
172 .pdiv = REG_VAL(0x8, 0, 4),
234 .pdiv = REG_VAL(0x8, 0, 4),
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| D | clk-iproc.h | 98 unsigned int pdiv; member
174 struct iproc_clk_reg_op pdiv; member
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| D | clk-cygnus.c | 66 .pdiv = REG_VAL(0x14, 0, 4),
124 .pdiv = REG_VAL(0x4, 26, 4),
202 .pdiv = REG_VAL(0x14, 0, 4),
281 .pdiv = REG_VAL(0x44, 0, 4),
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| D | clk-nsp.c | 52 .pdiv = REG_VAL(0x18, 24, 3),
109 .pdiv = REG_VAL(0x4, 28, 3),
|
| /Linux-v4.19/drivers/gpu/drm/i915/ |
| D | intel_dpll_mgr.c | 1158 uint32_t pdiv; member
1182 params->pdiv = 0; in skl_wrpll_params_populate()
1185 params->pdiv = 1; in skl_wrpll_params_populate()
1188 params->pdiv = 2; in skl_wrpll_params_populate()
1191 params->pdiv = 4; in skl_wrpll_params_populate()
1327 DPLL_CFGCR2_PDIV(wrpll_params.pdiv) | in skl_ddi_hdmi_pll_dividers()
2128 static void cnl_wrpll_get_multipliers(int bestdiv, int *pdiv, in cnl_wrpll_get_multipliers() argument
2134 *pdiv = 2; in cnl_wrpll_get_multipliers()
2138 *pdiv = 2; in cnl_wrpll_get_multipliers()
2142 *pdiv = 3; in cnl_wrpll_get_multipliers()
[all …]
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| /Linux-v4.19/drivers/thermal/tegra/ |
| D | tegra124-soctherm.c | 50 .pdiv = 8,
68 .pdiv = 8,
86 .pdiv = 8,
102 .pdiv = 8,
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| D | tegra132-soctherm.c | 50 .pdiv = 8,
68 .pdiv = 8,
86 .pdiv = 8,
102 .pdiv = 8,
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| D | tegra210-soctherm.c | 51 .pdiv = 8,
69 .pdiv = 8,
87 .pdiv = 8,
103 .pdiv = 8,
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| D | soctherm.h | 68 u32 pdiv, pdiv_ate, pdiv_mask; member
79 u32 tall, tiddq_en, ten_count, pdiv, pdiv_ate, tsample, tsample_ate; member
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| /Linux-v4.19/drivers/clk/st/ |
| D | clk-flexgen.c | 31 struct clk_divider pdiv; member
134 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; in flexgen_recalc_rate()
150 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; in flexgen_set_rate()
235 fgxbar->pdiv.lock = lock; in clk_register_flexgen()
236 fgxbar->pdiv.reg = reg + 0x58 + idx * 4; in clk_register_flexgen()
237 fgxbar->pdiv.width = 10; in clk_register_flexgen()
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| /Linux-v4.19/arch/arm/mach-ep93xx/ |
| D | clock.c | 363 int *psel, int *esel, int *pdiv, int *div) in calc_clk_div() argument
400 *pdiv = __pdiv - 3; in calc_clk_div()
420 int err, psel = 0, esel = 0, pdiv = 0, div = 0; in set_div_rate() local
423 err = calc_clk_div(clk, rate, &psel, &esel, &pdiv, &div); in set_div_rate()
434 (pdiv << EP93XX_SYSCON_CLKDIV_PDIV_SHIFT) | div; in set_div_rate()
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