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Searched refs:pdc_write (Results 1 – 3 of 3) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/msm/adreno/
Da6xx_gmu.c377 pdc_write(gmu, REG_A6XX_PDC_GPU_SEQ_MEM_0, 0xfebea1e1); in a6xx_gmu_rpmh_init()
378 pdc_write(gmu, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 1, 0xa5a4a3a2); in a6xx_gmu_rpmh_init()
379 pdc_write(gmu, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 2, 0x8382a6e0); in a6xx_gmu_rpmh_init()
380 pdc_write(gmu, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 3, 0xbce3e284); in a6xx_gmu_rpmh_init()
381 pdc_write(gmu, REG_A6XX_PDC_GPU_SEQ_MEM_0 + 4, 0x002081fc); in a6xx_gmu_rpmh_init()
384 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS1_CMD_ENABLE_BANK, 7); in a6xx_gmu_rpmh_init()
385 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS1_CMD_WAIT_FOR_CMPL_BANK, 0); in a6xx_gmu_rpmh_init()
386 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS1_CONTROL, 0); in a6xx_gmu_rpmh_init()
387 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS1_CMD0_MSGID, 0x10108); in a6xx_gmu_rpmh_init()
388 pdc_write(gmu, REG_A6XX_PDC_GPU_TCS1_CMD0_ADDR, 0x30010); in a6xx_gmu_rpmh_init()
[all …]
Da6xx_gmu.h92 static inline void pdc_write(struct a6xx_gmu *gmu, u32 offset, u32 value) in pdc_write() function
/Linux-v4.19/drivers/irqchip/
Dirq-imgpdc.c89 static void pdc_write(struct pdc_intc_priv *priv, unsigned int reg_offs, in pdc_write() function
137 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in perip_irq_mask()
147 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in perip_irq_unmask()
186 pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake); in syswake_irq_set_type()
209 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in pdc_irq_set_wake()
277 pdc_write(priv, PDC_IRQ_ENABLE, 0); in pdc_intc_setup()
285 pdc_write(priv, PDC_IRQ_ROUTE, priv->irq_route); in pdc_intc_setup()
293 pdc_write(priv, soc_sys_wake_regoff, soc_sys_wake); in pdc_intc_setup()