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Searched refs:pcie_speed_table (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu7_hwmgr.c552 phm_reset_single_dpm_table(&data->dpm_table.pcie_speed_table, in smu7_setup_default_pcie_table()
563 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, i - 1, in smu7_setup_default_pcie_table()
569 data->dpm_table.pcie_speed_table.count = max_entry - 1; in smu7_setup_default_pcie_table()
573 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 0, in smu7_setup_default_pcie_table()
578 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 1, in smu7_setup_default_pcie_table()
583 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 2, in smu7_setup_default_pcie_table()
588 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 3, in smu7_setup_default_pcie_table()
593 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 4, in smu7_setup_default_pcie_table()
598 phm_setup_pcie_table_entry(&data->dpm_table.pcie_speed_table, 5, in smu7_setup_default_pcie_table()
604 data->dpm_table.pcie_speed_table.count = 6; in smu7_setup_default_pcie_table()
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Dsmu7_hwmgr.h106 struct smu7_single_dpm_table pcie_speed_table; member
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Dvegam_smumgr.c579 for (i = 0; i <= dpm_table->pcie_speed_table.count; i++) { in vegam_populate_smc_link_level()
581 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in vegam_populate_smc_link_level()
583 dpm_table->pcie_speed_table.dpm_levels[i].param1); in vegam_populate_smc_link_level()
591 (uint8_t)dpm_table->pcie_speed_table.count; in vegam_populate_smc_link_level()
595 phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in vegam_populate_smc_link_level()
870 uint8_t pcie_entry_cnt = (uint8_t) hw_data->dpm_table.pcie_speed_table.count; in vegam_populate_all_graphic_levels()
2040 PP_ASSERT_WITH_CODE(hw_data->dpm_table.pcie_speed_table.count >= 1, in vegam_init_smc_table()
2044 hw_data->dpm_table.pcie_speed_table.count; in vegam_init_smc_table()
2109 for (i = 0; i <= hw_data->dpm_table.pcie_speed_table.count; i++) { in vegam_init_smc_table()
Dpolaris10_smumgr.c775 for (i = 0; i <= dpm_table->pcie_speed_table.count; i++) { in polaris10_populate_smc_link_level()
777 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in polaris10_populate_smc_link_level()
779 dpm_table->pcie_speed_table.dpm_levels[i].param1); in polaris10_populate_smc_link_level()
787 (uint8_t)dpm_table->pcie_speed_table.count; in polaris10_populate_smc_link_level()
791 phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in polaris10_populate_smc_link_level()
984 uint8_t pcie_entry_cnt = (uint8_t) hw_data->dpm_table.pcie_speed_table.count; in polaris10_populate_all_graphic_levels()
1919 for (i = 0; i <= hw_data->dpm_table.pcie_speed_table.count; i++) { in polaris10_init_smc_table()
Dtonga_smumgr.c505 for (i = 0; i <= dpm_table->pcie_speed_table.count; i++) { in tonga_populate_smc_link_level()
507 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in tonga_populate_smc_link_level()
509 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in tonga_populate_smc_link_level()
521 (uint8_t)dpm_table->pcie_speed_table.count; in tonga_populate_smc_link_level()
523 phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in tonga_populate_smc_link_level()
683 uint8_t pcie_entry_count = (uint8_t) data->dpm_table.pcie_speed_table.count; in tonga_populate_all_graphic_levels()
2335 PP_ASSERT_WITH_CODE((1 <= data->dpm_table.pcie_speed_table.count), in tonga_init_smc_table()
2339 table->PCIeBootLinkLevel = (uint8_t) (data->dpm_table.pcie_speed_table.count); in tonga_init_smc_table()
Dfiji_smumgr.c848 for (i = 0; i <= dpm_table->pcie_speed_table.count; i++) { in fiji_populate_smc_link_level()
850 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in fiji_populate_smc_link_level()
852 dpm_table->pcie_speed_table.dpm_levels[i].param1); in fiji_populate_smc_link_level()
860 (uint8_t)dpm_table->pcie_speed_table.count; in fiji_populate_smc_link_level()
862 phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in fiji_populate_smc_link_level()
1022 uint8_t pcie_entry_cnt = (uint8_t) data->dpm_table.pcie_speed_table.count; in fiji_populate_all_graphic_levels()
Dci_smumgr.c1002 for (i = 0; i <= dpm_table->pcie_speed_table.count; i++) { in ci_populate_smc_link_level()
1004 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
1006 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
1013 (uint8_t)dpm_table->pcie_speed_table.count; in ci_populate_smc_link_level()
1015 phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in ci_populate_smc_link_level()
2050 PP_ASSERT_WITH_CODE((1 <= data->dpm_table.pcie_speed_table.count), in ci_init_smc_table()
2054 table->PCIeBootLinkLevel = (uint8_t)data->dpm_table.pcie_speed_table.count; in ci_init_smc_table()
Diceland_smumgr.c772 for (i = 0; i <= dpm_table->pcie_speed_table.count; i++) { in iceland_populate_smc_link_level()
774 (uint8_t)dpm_table->pcie_speed_table.dpm_levels[i].value; in iceland_populate_smc_link_level()
776 (uint8_t)encode_pcie_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in iceland_populate_smc_link_level()
788 (uint8_t)dpm_table->pcie_speed_table.count; in iceland_populate_smc_link_level()
790 phm_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in iceland_populate_smc_link_level()
/Linux-v4.19/drivers/gpu/drm/radeon/
Dci_dpm.h70 struct ci_single_dpm_table pcie_speed_table; member
Dci_dpm.c2631 for (i = 0; i < dpm_table->pcie_speed_table.count; i++) { in ci_populate_smc_link_level()
2633 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
2635 r600_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
2641 pi->smc_state_table.LinkLevelCount = (u8)dpm_table->pcie_speed_table.count; in ci_populate_smc_link_level()
2643 ci_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in ci_populate_smc_link_level()
3407 &pi->dpm_table.pcie_speed_table, in ci_setup_default_pcie_tables()
3411 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 0, in ci_setup_default_pcie_tables()
3415 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 0, in ci_setup_default_pcie_tables()
3418 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 1, in ci_setup_default_pcie_tables()
3421 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 2, in ci_setup_default_pcie_tables()
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/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dci_dpm.h71 struct ci_single_dpm_table pcie_speed_table; member
Dci_dpm.c2769 for (i = 0; i < dpm_table->pcie_speed_table.count; i++) { in ci_populate_smc_link_level()
2771 (u8)dpm_table->pcie_speed_table.dpm_levels[i].value; in ci_populate_smc_link_level()
2773 amdgpu_encode_pci_lane_width(dpm_table->pcie_speed_table.dpm_levels[i].param1); in ci_populate_smc_link_level()
2779 pi->smc_state_table.LinkLevelCount = (u8)dpm_table->pcie_speed_table.count; in ci_populate_smc_link_level()
2781 ci_get_dpm_level_enable_mask_value(&dpm_table->pcie_speed_table); in ci_populate_smc_link_level()
3550 &pi->dpm_table.pcie_speed_table, in ci_setup_default_pcie_tables()
3554 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 0, in ci_setup_default_pcie_tables()
3558 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 0, in ci_setup_default_pcie_tables()
3561 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 1, in ci_setup_default_pcie_tables()
3564 ci_setup_pcie_table_entry(&pi->dpm_table.pcie_speed_table, 2, in ci_setup_default_pcie_tables()
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