Searched refs:parent1 (Results 1 – 2 of 2) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/msm/dsi/pll/ |
| D | dsi_pll_28nm.c | 519 char clk_name[32], parent1[32], parent2[32], vco_name[32]; in pll_28nm_register() local
540 snprintf(parent1, 32, "dsi%dvco_clk", pll_28nm->id); in pll_28nm_register()
542 parent1, CLK_SET_RATE_PARENT, in pll_28nm_register()
548 snprintf(parent1, 32, "dsi%danalog_postdiv_clk", pll_28nm->id); in pll_28nm_register()
550 parent1, CLK_SET_RATE_PARENT, in pll_28nm_register()
554 snprintf(parent1, 32, "dsi%dvco_clk", pll_28nm->id); in pll_28nm_register()
557 parent1, 0, pll_28nm->mmio + in pll_28nm_register()
562 snprintf(parent1, 32, "dsi%dvco_clk", pll_28nm->id); in pll_28nm_register()
566 parent1, parent2 in pll_28nm_register()
571 snprintf(parent1, 32, "dsi%dbyte_mux", pll_28nm->id); in pll_28nm_register()
[all …]
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| /Linux-v4.19/drivers/clk/davinci/ |
| D | da8xx-cfgchip.c | 200 const char *parent1; member
243 const char * const parent_names[] = { info->parent0, info->parent1 }; in da8xx_cfgchip_mux_clk_register()
273 .parent1 = "div4.5",
295 .parent1 = "pll1_sysclk2",
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