Searched refs:num_instances (Results 1 – 17 of 17) sorted by relevance
250 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_free_microcode()304 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()333 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()519 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_stop()580 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_ctx_switch_enable()622 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_enable()650 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()751 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()798 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_load_microcode()1158 adev->sdma.num_instances = 1; in sdma_v3_0_early_init()[all …]
74 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_free_microcode()133 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()146 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()313 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_stop()372 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_ctx_switch_enable()410 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_enable()436 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()502 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()549 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_load_microcode()950 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in cik_sdma_early_init()[all …]
116 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop()136 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start()488 adev->sdma.num_instances = 2; in si_dma_early_init()514 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_sw_init()536 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_sw_fini()686 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_clockgating_state()698 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_clockgating_state()780 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_set_ring_funcs()886 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_set_vm_pte_funcs()890 adev->vm_manager.vm_pte_num_rings = adev->sdma.num_instances; in si_dma_set_vm_pte_funcs()
230 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()261 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()504 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_stop()566 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()601 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()628 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_resume()847 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()1214 adev->sdma.num_instances = 1; in sdma_v4_0_early_init()1216 adev->sdma.num_instances = 2; in sdma_v4_0_early_init()1251 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()[all …]
113 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_free_microcode()146 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()176 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()344 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_stop()386 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_enable()412 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_resume()478 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_resume()525 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_load_microcode()884 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in sdma_v2_4_early_init()924 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_sw_init()[all …]
243 ip_num_rings = adev->sdma.num_instances; in amdgpu_queue_mgr_map()
245 if (query_fw->index >= adev->sdma.num_instances) in amdgpu_firmware_info()344 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_info_ioctl()1248 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_debugfs_firmware_info()
1061 int num_instances; member1675 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_get_sdma_instance()
72 unsigned short num_instances; member
1491 if (!drv_data || fimc->index >= drv_data->num_instances || in fimc_lite_probe()1654 .num_instances = 2,1665 .num_instances = 3,
94 int num_instances; /* current number of timer instances */ member
204 u8 num_instances; member216 u8 num_instances; member532 return ff_resp.num_instances; in aem_find_aem1_count()668 fi_resp->num_instances <= instance_num) in aem_find_aem2()
193 if (master->timer->num_instances >= in snd_timer_check_slave()198 master->timer->num_instances++; in snd_timer_check_slave()224 if (master->timer->num_instances >= in snd_timer_check_master()228 master->timer->num_instances++; in snd_timer_check_master()308 if (timer->num_instances >= timer->max_instances) { in snd_timer_open()338 timer->num_instances++; in snd_timer_open()366 timer->num_instances--; in snd_timer_close_locked()382 timer->num_instances--; in snd_timer_close_locked()
378 atomic_t num_instances; /* count of driver instances */ member2333 if (atomic_inc_return(&dev->num_instances) == 1) in vpe_open()2390 if (atomic_dec_return(&dev->num_instances) == 0) in vpe_release()2488 atomic_set(&dev->num_instances, 0); in vpe_probe()
539 __u8 num_instances; member
426 int vf, int num_instances) in initialize_res_quotas() argument428 res_alloc->guaranteed[vf] = num_instances / in initialize_res_quotas()430 res_alloc->quota[vf] = (num_instances / 2) + res_alloc->guaranteed[vf]; in initialize_res_quotas()432 res_alloc->res_free = num_instances; in initialize_res_quotas()
6380 rp->num_instances = hdev->adv_instance_cnt; in read_adv_features()
