Searched refs:n_phy (Results 1 – 15 of 15) sorted by relevance
99 sas_phy->enabled = (phy_id < mvi->chip->n_phy) ? 1 : 0; in mvs_phy_init()240 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_alloc()383 ((struct mvs_prv_info *)sha->lldd_ha)->n_phy = mvi->chip->n_phy; in mvs_pci_alloc()443 phy_nr = core_nr * chip_info->n_phy; in mvs_prep_sas_ha_init()486 for (i = 0; i < chip_info->n_phy; i++) { in mvs_post_sas_ha_init()487 sha->sas_phy[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()489 sha->sas_port[j * chip_info->n_phy + i] = in mvs_post_sas_ha_init()499 sha->num_phys = nr_core * chip_info->n_phy; in mvs_post_sas_ha_init()515 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_init_sas_add()
98 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; in mvs_find_dev_mvi()123 phyno[n] = (j >= mvi->chip->n_phy) ? in mvs_find_dev_phyno()124 (j - mvi->chip->n_phy) : j; in mvs_find_dev_phyno()192 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy; in mvs_phy_control()277 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy); in mvs_bytes_dmaed()297 for (i = 0; i < mvi->chip->n_phy; ++i) in mvs_scan_start()1043 i + mvi->id * mvi->chip->n_phy; in mvs_update_phyinfo()1084 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info); in mvs_update_phyinfo()1086 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr); in mvs_update_phyinfo()1108 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy; in mvs_port_notify_formed()[all …]
50 if (mvi->chip->n_phy <= MVS_SOC_PORTS) in mvs_64xx_enable_xmt()72 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_phy_hacks()338 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_init()361 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_64xx_init()
183 u32 n_phy; member421 u8 n_phy; member
206 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_int_full()
476 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_94xx_init()502 for (i = 0; i < mvi->chip->n_phy; i++) { in mvs_94xx_init()848 port_id + mvi->id * mvi->chip->n_phy, i, id_frame[i]); in mvs_94xx_get_att_identify_frame()
126 sas_phy->enabled = (phy_id < pm8001_ha->chip->n_phy) ? 1 : 0; in pm8001_phy_init()252 pm8001_ha->chip->n_phy)); in pm8001_alloc()253 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_alloc()545 phy_nr = chip_info->n_phy; in pm8001_prep_sas_ha_init()591 for (i = 0; i < chip_info->n_phy; i++) { in pm8001_post_sas_ha_init()602 sha->num_phys = chip_info->n_phy; in pm8001_post_sas_ha_init()679 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()690 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_init_sas_add()845 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_settings_ven_117c_12G()1259 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_pci_resume()
238 u32 n_phy; member
250 for (i = 0; i < pm8001_ha->chip->n_phy; ++i) in pm8001_scan_start()
3339 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in mpi_hw_event()4612 for (i = 0; i < pm8001_ha->chip->n_phy; i++) { in pm8001_set_phy_profile()
576 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v1_hw()585 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v1_hw()696 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v1_hw()817 for (i = 0; i < hisi_hba->n_phy; i++) { in start_phys_v1_hw()828 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v1_hw()871 for (i = 0; i < hisi_hba->n_phy; i++) in get_wideport_bitmap_v1_hw()1692 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_init_v1_hw()1716 idx = hisi_hba->n_phy * HISI_SAS_PHY_INT_NR; in interrupt_init_v1_hw()1734 idx = (hisi_hba->n_phy * HISI_SAS_PHY_INT_NR) + hisi_hba->queue_count; in interrupt_init_v1_hw()1761 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_openall_v1_hw()
1018 if (hisi_hba->n_phy == 9) in reset_hw_v2_hw()1026 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v2_hw()1035 for (i = 0; i < hisi_hba->n_phy; i++) { in reset_hw_v2_hw()1117 hisi_hba->reject_stp_links_msk = (1 << hisi_hba->n_phy) - 1; in phys_reject_stp_links_v2_hw()1118 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in phys_reject_stp_links_v2_hw()1133 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in phys_try_accept_stp_links_v2_hw()1223 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v2_hw()1328 for (i = 0; i < hisi_hba->n_phy; i++) { in link_timeout_enable_link()1350 for (i = 0; i < hisi_hba->n_phy && reg_val; i++) { in link_timeout_disable_link()1576 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v2_hw()[all …]
172 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) in hisi_sas_stop_phys()758 sas_phy->enabled = (phy_no < hisi_hba->n_phy) ? 1 : 0; in hisi_sas_phy_init()1190 for (phy_no = 0; phy_no < hisi_hba->n_phy; phy_no++) { in hisi_sas_rescan_topology()1287 for (port_no = 0; port_no < hisi_hba->n_phy; port_no++) { in hisi_sas_terminate_stp_reject()1980 s = sizeof(struct hisi_sas_initial_fis) * hisi_hba->n_phy; in hisi_sas_init_mem()2003 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_alloc()2216 if (device_property_read_u32(dev, "phy-count", &hisi_hba->n_phy)) { in hisi_sas_get_fw_info()2307 phy_nr = port_nr = hisi_hba->n_phy; in hisi_sas_probe()2333 sha->num_phys = hisi_hba->n_phy; in hisi_sas_probe()2336 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_probe()
458 for (i = 0; i < hisi_hba->n_phy; i++) { in init_reg_v3_hw()819 for (i = 0; i < hisi_hba->n_phy; i++) { in phys_init_v3_hw()849 for (i = 0; i < hisi_hba->n_phy; i++) in get_wideport_bitmap_v3_hw()1957 for (i = 0; i < hisi_hba->n_phy; i++) { in interrupt_disable_v3_hw()2053 if ((reg_index + reg_count) > ((hisi_hba->n_phy + 3) / 4)) { in write_gpio_v3_hw()2228 phy_nr = port_nr = hisi_hba->n_phy; in hisi_sas_v3_probe()2255 sha->num_phys = hisi_hba->n_phy; in hisi_sas_v3_probe()2258 for (i = 0; i < hisi_hba->n_phy; i++) { in hisi_sas_v3_probe()
279 int n_phy; member
