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Searched refs:mux_val (Results 1 – 10 of 10) sorted by relevance

/Linux-v4.19/drivers/clk/mmp/
Dclk-mix.c134 static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val, in _set_rate() argument
166 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
280 u32 div_val, mux_val; in mmp_clk_mix_set_rate_and_parent() local
284 mux_val = _get_mux_val(mix, index); in mmp_clk_mix_set_rate_and_parent()
286 return _set_rate(mix, mux_val, div_val, 1, 1); in mmp_clk_mix_set_rate_and_parent()
296 u32 mux_val; in mmp_clk_mix_get_parent() local
313 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
315 return _get_mux(mix, mux_val); in mmp_clk_mix_get_parent()
353 u32 div_val, mux_val; in mmp_clk_set_parent() local
365 mux_val = _get_mux_val(mix, item->parent_index); in mmp_clk_set_parent()
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/Linux-v4.19/drivers/dma/ti/
Ddma-crossbar.c52 u8 mux_val; member
74 map->mux_val, map->dma_line); in ti_am335x_xbar_free()
116 map->mux_val = (u8)dma_spec->args[2]; in ti_am335x_xbar_route_allocate()
122 map->mux_val, map->dma_line); in ti_am335x_xbar_route_allocate()
124 ti_am335x_xbar_write(xbar->iomem, map->dma_line, map->mux_val); in ti_am335x_xbar_route_allocate()
/Linux-v4.19/drivers/gpio/
Dgpio-sodaville.c193 u32 mux_val; in sdv_gpio_probe() local
219 mux_val = of_read_number(prop, 1); in sdv_gpio_probe()
220 writel(mux_val, sd->gpio_pub_base + GPMUXCTL); in sdv_gpio_probe()
/Linux-v4.19/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx6sx-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx6ul-pinctrl.txt10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx6sll-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx8mq-pinctrl.txt13 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx7d-pinctrl.txt32 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx-pinctrl.txt26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
/Linux-v4.19/drivers/pinctrl/
Dpinctrl-zynq.c82 unsigned int mux_val; member
772 .mux_val = mval, \
780 .mux_val = mval, \
939 reg |= func->mux_val << ZYNQ_PINMUX_MUX_SHIFT; in zynq_pinmux_set_mux()