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Searched refs:mul (Results 1 – 25 of 98) sorted by relevance

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/Linux-v4.19/arch/mips/ar7/
Dclock.c83 u32 mul; member
112 int *postdiv, int *mul) in approximate() argument
121 *mul = i; in approximate()
129 int *mul) in calculate() argument
136 *mul = target / tmp_gcd; in calculate()
138 if ((*mul < 1) || (*mul >= 16)) in calculate()
144 if (base / *prediv * *mul / *postdiv != target) { in calculate()
145 approximate(base, target, prediv, postdiv, mul); in calculate()
146 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
153 *prediv, *postdiv, *mul); in calculate()
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/Linux-v4.19/drivers/clk/
Dclk-vt8500.c464 u32 mul; in wm8750_find_pll_bits() local
473 for (mul = 0; mul <= 255; mul++) { in wm8750_find_pll_bits()
474 tclk = parent_rate * (mul + 1) / ((div1 + 1) * (1 << div2)); in wm8750_find_pll_bits()
481 *multiplier = mul; in wm8750_find_pll_bits()
489 *multiplier = mul; in wm8750_find_pll_bits()
512 u32 mul; in wm8850_find_pll_bits() local
521 for (mul = 0; mul <= 127; mul++) { in wm8850_find_pll_bits()
522 tclk = parent_rate * ((mul + 1) * 2) / in wm8850_find_pll_bits()
529 *multiplier = mul; in wm8850_find_pll_bits()
537 *multiplier = mul; in wm8850_find_pll_bits()
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Dclk-tango4.c25 u32 val, mul, div; in make_pll() local
29 mul = extract_pll_n(val) + 1; in make_pll()
31 clk_register_fixed_factor(NULL, name, parent, 0, mul, div); in make_pll()
39 u32 val, mul, div; in make_cd() local
43 mul = 1 << 27; in make_cd()
45 clk_register_fixed_factor(NULL, name, "pll2", 0, mul, div); in make_cd()
Dclk-cdce706.c76 unsigned mul; member
172 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); in cdce706_pll_recalc_rate()
175 if (hwd->div && hwd->mul) { in cdce706_pll_recalc_rate()
176 u64 res = (u64)parent_rate * hwd->mul; in cdce706_pll_recalc_rate()
192 unsigned long mul, div; in cdce706_pll_round_rate() local
201 &mul, &div); in cdce706_pll_round_rate()
202 hwd->mul = mul; in cdce706_pll_round_rate()
207 __func__, hwd->idx, mul, div); in cdce706_pll_round_rate()
209 res = (u64)*parent_rate * hwd->mul; in cdce706_pll_round_rate()
218 unsigned long mul = hwd->mul, div = hwd->div; in cdce706_pll_set_rate() local
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Dclk-moxart.c24 unsigned int mul; in moxart_of_pll_clk_init() local
37 mul = readl(base + 0x30) >> 3 & 0x3f; in moxart_of_pll_clk_init()
46 hw = clk_hw_register_fixed_factor(NULL, name, parent_name, 0, mul, 1); in moxart_of_pll_clk_init()
Dclk-nomadik.c227 u8 mul; in pll_clk_recalc_rate() local
230 mul = (val >> 8) & 0x3FU; in pll_clk_recalc_rate()
231 mul += 2; in pll_clk_recalc_rate()
233 return (parent_rate * mul) >> div; in pll_clk_recalc_rate()
237 u8 mul; in pll_clk_recalc_rate() local
239 mul = (val >> 24) & 0x3FU; in pll_clk_recalc_rate()
240 mul += 2; in pll_clk_recalc_rate()
241 return (parent_rate * mul); in pll_clk_recalc_rate()
/Linux-v4.19/drivers/clk/actions/
Dowl-factor.c29 unsigned int val, unsigned int *mul, unsigned int *div) in _get_table_div_mul() argument
35 *mul = clkt->mul; in _get_table_div_mul()
52 calc_rate = parent_rate * clkt->mul; in _get_table_val()
87 try_parent_rate = rate * clkt->div / clkt->mul; in clk_val_best()
91 __func__, clkt->val, clkt->mul, clkt->div, in clk_val_best()
104 cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul; in clk_val_best()
127 unsigned int val, mul = 0, div = 1; in owl_factor_helper_round_rate() local
130 _get_table_div_mul(clkt, val, &mul, &div); in owl_factor_helper_round_rate()
132 return *parent_rate * mul / div; in owl_factor_helper_round_rate()
151 u32 reg, val, mul, div; in owl_factor_helper_recalc_rate() local
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Dowl-pll.c20 u32 mul; in owl_pll_calculate_mul() local
22 mul = DIV_ROUND_CLOSEST(rate, pll_hw->bfreq); in owl_pll_calculate_mul()
23 if (mul < pll_hw->min_mul) in owl_pll_calculate_mul()
24 mul = pll_hw->min_mul; in owl_pll_calculate_mul()
25 else if (mul > pll_hw->max_mul) in owl_pll_calculate_mul()
26 mul = pll_hw->max_mul; in owl_pll_calculate_mul()
28 return mul &= mul_mask(pll_hw); in owl_pll_calculate_mul()
65 u32 mul; in owl_pll_round_rate() local
76 mul = owl_pll_calculate_mul(pll_hw, rate); in owl_pll_round_rate()
78 return pll_hw->bfreq * mul; in owl_pll_round_rate()
/Linux-v4.19/drivers/clk/tegra/
Dclk-utils.c16 int mul; in div_frac_get() local
21 mul = 1 << frac_width; in div_frac_get()
24 divider_ux1 *= mul; in div_frac_get()
32 divider_ux1 *= mul; in div_frac_get()
34 if (divider_ux1 < mul) in div_frac_get()
37 divider_ux1 -= mul; in div_frac_get()
Dclk-divider.c51 int div, mul; in clk_frac_div_recalc_rate() local
57 mul = get_mul(divider); in clk_frac_div_recalc_rate()
58 div += mul; in clk_frac_div_recalc_rate()
60 rate *= mul; in clk_frac_div_recalc_rate()
71 int div, mul; in clk_frac_div_round_rate() local
81 mul = get_mul(divider); in clk_frac_div_round_rate()
83 return DIV_ROUND_UP(output_rate * mul, div + mul); in clk_frac_div_round_rate()
Dclk-periph-fixed.c67 rate = (unsigned long long)parent_rate * fixed->mul; in tegra_clk_periph_fixed_recalc_rate()
84 unsigned int mul, in tegra_clk_register_periph_fixed() argument
109 fixed->mul = mul; in tegra_clk_register_periph_fixed()
/Linux-v4.19/drivers/cpufreq/
Dcpufreq-nforce2.c25 #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div) argument
69 unsigned char mul, div; in nforce2_calc_fsb() local
71 mul = (pll >> 8) & 0xff; in nforce2_calc_fsb()
75 return NFORCE2_XTAL * mul / div; in nforce2_calc_fsb()
89 unsigned char mul = 0, div = 0; in nforce2_calc_pll() local
93 while (((mul == 0) || (div == 0)) && (tried <= 3)) { in nforce2_calc_pll()
98 mul = xmul; in nforce2_calc_pll()
104 if ((mul == 0) || (div == 0)) in nforce2_calc_pll()
107 return NFORCE2_PLL(mul, div); in nforce2_calc_pll()
Dcppc_cpufreq.c89 u64 mul, div; in cppc_cpufreq_perf_to_khz() local
93 mul = caps->nominal_freq; in cppc_cpufreq_perf_to_khz()
96 mul = caps->nominal_freq - caps->lowest_freq; in cppc_cpufreq_perf_to_khz()
102 mul = max_khz; in cppc_cpufreq_perf_to_khz()
105 return (u64)perf * mul / div; in cppc_cpufreq_perf_to_khz()
113 u64 mul, div; in cppc_cpufreq_khz_to_perf() local
117 mul = caps->nominal_perf; in cppc_cpufreq_khz_to_perf()
120 mul = caps->lowest_perf; in cppc_cpufreq_khz_to_perf()
126 mul = cpu->perf_caps.highest_perf; in cppc_cpufreq_khz_to_perf()
130 return (u64)freq * mul / div; in cppc_cpufreq_khz_to_perf()
/Linux-v4.19/include/linux/
Dmath64.h177 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
179 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr()
184 static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) in mul_u64_u64_shr() argument
186 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr()
193 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
201 ret = mul_u32_u32(al, mul) >> shift; in mul_u64_u32_shr()
203 ret += mul_u32_u32(ah, mul) << (32 - shift); in mul_u64_u32_shr()
256 static inline u64 mul_u64_u32_div(u64 a, u32 mul, u32 divisor) in mul_u64_u32_div() argument
270 rl.ll = mul_u32_u32(u.l.low, mul); in mul_u64_u32_div()
271 rh.ll = mul_u32_u32(u.l.high, mul) + rl.l.high; in mul_u64_u32_div()
/Linux-v4.19/drivers/clk/at91/
Dclk-pll.c59 u16 mul; member
87 u16 mul; in clk_pll_prepare() local
91 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
95 (div == pll->div && mul == pll->mul)) in clk_pll_prepare()
108 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
136 return (parent_rate / pll->div) * (pll->mul + 1); in clk_pll_recalc_rate()
141 u32 *div, u32 *mul, in clk_pll_get_best_div_mul() argument
241 if (mul) in clk_pll_get_best_div_mul()
242 *mul = bestmul - 1; in clk_pll_get_best_div_mul()
264 u32 mul; in clk_pll_set_rate() local
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/Linux-v4.19/crypto/
Dtgr192.c401 static void tgr192_round(u64 * ra, u64 * rb, u64 * rc, u64 x, int mul) in tgr192_round() argument
412 b *= mul; in tgr192_round()
420 static void tgr192_pass(u64 * ra, u64 * rb, u64 * rc, u64 * x, int mul) in tgr192_pass() argument
426 tgr192_round(&a, &b, &c, x[0], mul); in tgr192_pass()
427 tgr192_round(&b, &c, &a, x[1], mul); in tgr192_pass()
428 tgr192_round(&c, &a, &b, x[2], mul); in tgr192_pass()
429 tgr192_round(&a, &b, &c, x[3], mul); in tgr192_pass()
430 tgr192_round(&b, &c, &a, x[4], mul); in tgr192_pass()
431 tgr192_round(&c, &a, &b, x[5], mul); in tgr192_pass()
432 tgr192_round(&a, &b, &c, x[6], mul); in tgr192_pass()
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/Linux-v4.19/drivers/net/wireless/ath/ath9k/
Dcommon.h39 #define ATH_EP_MUL(x, mul) ((x) * (mul)) argument
47 #define ATH_EP_RND(x, mul) \ argument
48 (((x) + ((mul)/2)) / (mul))
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_afmt.c54 unsigned long div, mul; in amdgpu_afmt_calc_cts() local
70 mul = ((128*freq/1000) + (n-1))/n; in amdgpu_afmt_calc_cts()
72 n *= mul; in amdgpu_afmt_calc_cts()
73 cts *= mul; in amdgpu_afmt_calc_cts()
/Linux-v4.19/arch/arm/lib/
Dmuldi3.S31 mul xh, yl, xh
38 mul yh, xl, yh
39 mul xl, yl, xl
40 mul ip, yl, ip
/Linux-v4.19/drivers/pwm/
Dpwm-img.c99 unsigned long mul, output_clk_hz, input_clk_hz; in img_pwm_config() local
113 mul = DIV_ROUND_UP(input_clk_hz, output_clk_hz); in img_pwm_config()
114 if (mul <= max_timebase) { in img_pwm_config()
116 timebase = DIV_ROUND_UP(mul, 1); in img_pwm_config()
117 } else if (mul <= max_timebase * 8) { in img_pwm_config()
119 timebase = DIV_ROUND_UP(mul, 8); in img_pwm_config()
120 } else if (mul <= max_timebase * 64) { in img_pwm_config()
122 timebase = DIV_ROUND_UP(mul, 64); in img_pwm_config()
123 } else if (mul <= max_timebase * 512) { in img_pwm_config()
125 timebase = DIV_ROUND_UP(mul, 512); in img_pwm_config()
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/Linux-v4.19/arch/m68k/fpsp040/
Dbinstr.S16 | bit 63. The fraction is multiplied by 10 using a mul by 2
17 | shift and a mul by 8 shift. The bits shifted out of the
51 | d2: upper 32-bits of fraction for mul by 8
52 | d3: lower 32-bits of fraction for mul by 8
53 | d4: upper 32-bits of fraction for mul by 2
54 | d5: lower 32-bits of fraction for mul by 2
97 asll #1,%d5 |mul d5 by 2
98 roxll #1,%d4 |mul d4 by 2
100 addxw %d6,%d1 |add in extend from mul by 2
102 | A5. Add mul by 8 to mul by 2. D1 contains the digit formed.
/Linux-v4.19/drivers/media/i2c/
Dsmiapp-pll.c162 struct smiapp_pll *pll, struct smiapp_pll_branch *op_pll, uint32_t mul, in __smiapp_pll_calculate() argument
187 more_mul_max = limits->max_pll_multiplier / mul; in __smiapp_pll_calculate()
195 / (pll->ext_clk_freq_hz / pll->pre_pll_clk_div * mul)); in __smiapp_pll_calculate()
206 DIV_ROUND_UP(limits->max_pll_multiplier, mul)); in __smiapp_pll_calculate()
213 * mul); in __smiapp_pll_calculate()
218 DIV_ROUND_UP(limits->min_pll_multiplier, mul)); in __smiapp_pll_calculate()
243 pll->pll_multiplier = mul * i; in __smiapp_pll_calculate()
403 uint32_t mul, div; in smiapp_pll_calculate() local
457 mul = div_u64(pll->pll_op_clk_freq_hz, i); in smiapp_pll_calculate()
459 dev_dbg(dev, "mul %u / div %u\n", mul, div); in smiapp_pll_calculate()
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/Linux-v4.19/drivers/clk/imgtec/
Dclk-boston.c38 uint mmcmdiv, mul, cpu_div, sys_div; in clk_boston_setup() local
57 mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL); in clk_boston_setup()
60 sys_freq = mult_frac(in_freq, mul, sys_div); in clk_boston_setup()
63 cpu_freq = mult_frac(in_freq, mul, cpu_div); in clk_boston_setup()
/Linux-v4.19/arch/arm/boot/compressed/
Dll_char_wr.S69 mul r7, r2, r7
74 mul r7, r2, r7
88 mul r4, r2, ip
91 mul ip, r2, ip @ avoid r4
98 mul r4, r2, ip
101 mul ip, r2, ip @ avoid r4
/Linux-v4.19/arch/mips/ralink/
Dmt7620.c370 mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) in mt7620_calc_rate() argument
375 t *= mul; in mt7620_calc_rate()
413 u32 mul; in mt7620_get_cpu_pll_rate() local
423 mul = (reg >> CPLL_CFG0_PLL_MULT_RATIO_SHIFT) & in mt7620_get_cpu_pll_rate()
425 mul += 24; in mt7620_get_cpu_pll_rate()
427 mul *= 2; in mt7620_get_cpu_pll_rate()
434 return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); in mt7620_get_cpu_pll_rate()
456 u32 mul; in mt7620_get_cpu_rate() local
461 mul = reg & CPU_SYS_CLKCFG_CPU_FFRAC_MASK; in mt7620_get_cpu_rate()
465 return mt7620_calc_rate(pll_rate, mul, div); in mt7620_get_cpu_rate()

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