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Searched refs:mmVM_CONTEXT1_CNTL (Results 1 – 16 of 16) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dgmc_v6_0.c423 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v6_0_set_fault_enable_default()
436 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v6_0_set_fault_enable_default()
568 WREG32(mmVM_CONTEXT1_CNTL, in gmc_v6_0_gart_enable()
617 WREG32(mmVM_CONTEXT1_CNTL, 0); in gmc_v6_0_gart_disable()
1085 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v6_0_vm_fault_interrupt_state()
1087 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v6_0_vm_fault_interrupt_state()
1093 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v6_0_vm_fault_interrupt_state()
1095 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v6_0_vm_fault_interrupt_state()
Dgmc_v7_0.c518 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_set_fault_enable_default()
531 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_set_fault_enable_default()
679 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_gart_enable()
684 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_gart_enable()
734 WREG32(mmVM_CONTEXT1_CNTL, 0); in gmc_v7_0_gart_disable()
1250 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_vm_fault_interrupt_state()
1252 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_vm_fault_interrupt_state()
1260 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v7_0_vm_fault_interrupt_state()
1262 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v7_0_vm_fault_interrupt_state()
Dgmc_v8_0.c721 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_set_fault_enable_default()
736 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_set_fault_enable_default()
900 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_gart_enable()
912 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_gart_enable()
956 WREG32(mmVM_CONTEXT1_CNTL, 0); in gmc_v8_0_gart_disable()
1400 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1402 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_vm_fault_interrupt_state()
1410 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1412 WREG32(mmVM_CONTEXT1_CNTL, tmp); in gmc_v8_0_vm_fault_interrupt_state()
Dgfxhub_v1_0.c204 tmp = RREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i); in gfxhub_v1_0_setup_vmid_config()
229 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, i, tmp); in gfxhub_v1_0_setup_vmid_config()
Dmmhub_v1_0.c216 tmp = RREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i); in mmhub_v1_0_setup_vmid_config()
241 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, i, tmp); in mmhub_v1_0_setup_vmid_config()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_d.h546 #define mmVM_CONTEXT1_CNTL 0x505 macro
Dgmc_8_2_d.h604 #define mmVM_CONTEXT1_CNTL 0x505 macro
Dgmc_6_0_d.h1231 #define mmVM_CONTEXT1_CNTL 0x0505 macro
Dgmc_7_1_d.h579 #define mmVM_CONTEXT1_CNTL 0x505 macro
Dgmc_8_1_d.h602 #define mmVM_CONTEXT1_CNTL 0x505 macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_9_1_offset.h1358 #define mmVM_CONTEXT1_CNTL … macro
Dmmhub_9_3_0_offset.h1342 #define mmVM_CONTEXT1_CNTL … macro
Dmmhub_1_0_offset.h1326 #define mmVM_CONTEXT1_CNTL … macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h1204 #define mmVM_CONTEXT1_CNTL … macro
Dgc_9_1_offset.h1248 #define mmVM_CONTEXT1_CNTL … macro
Dgc_9_2_1_offset.h1186 #define mmVM_CONTEXT1_CNTL … macro