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Searched refs:mmVGA_SEQUENCER_RESET_CONTROL (Results 1 – 7 of 7) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_d.h4394 #define mmVGA_SEQUENCER_RESET_CONTROL 0x00C1 macro
Ddce_8_0_d.h5135 #define mmVGA_SEQUENCER_RESET_CONTROL 0xc1 macro
Ddce_11_0_d.h6095 #define mmVGA_SEQUENCER_RESET_CONTROL 0xc1 macro
Ddce_10_0_d.h6018 #define mmVGA_SEQUENCER_RESET_CONTROL 0xc1 macro
Ddce_11_2_d.h7769 #define mmVGA_SEQUENCER_RESET_CONTROL 0xc1 macro
Ddce_12_0_offset.h556 #define mmVGA_SEQUENCER_RESET_CONTROL … macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h390 #define mmVGA_SEQUENCER_RESET_CONTROL … macro