Home
last modified time | relevance | path

Searched refs:mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_7_0_offset.h177 #define mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX … macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h339 #define mmUVD_VCPU_CACHE_OFFSET0_BASE_IDX … macro