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Searched refs:mmUVD_RBC_RB_RPTR (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h71 #define mmUVD_RBC_RB_RPTR 0x3DA4 macro
Duvd_4_2_d.h71 #define mmUVD_RBC_RB_RPTR 0x3da4 macro
Duvd_5_0_d.h77 #define mmUVD_RBC_RB_RPTR 0x3da4 macro
Duvd_6_0_d.h93 #define mmUVD_RBC_RB_RPTR 0x3da4 macro
Duvd_7_0_offset.h196 #define mmUVD_RBC_RB_RPTR … macro
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Duvd_v4_2.c62 return RREG32(mmUVD_RBC_RB_RPTR); in uvd_v4_2_ring_get_rptr()
361 WREG32(mmUVD_RBC_RB_RPTR, 0x0); in uvd_v4_2_start()
363 ring->wptr = RREG32(mmUVD_RBC_RB_RPTR); in uvd_v4_2_start()
Duvd_v5_0.c59 return RREG32(mmUVD_RBC_RB_RPTR); in uvd_v5_0_ring_get_rptr()
418 WREG32(mmUVD_RBC_RB_RPTR, 0); in uvd_v5_0_start()
420 ring->wptr = RREG32(mmUVD_RBC_RB_RPTR); in uvd_v5_0_start()
Duvd_v6_0.c81 return RREG32(mmUVD_RBC_RB_RPTR); in uvd_v6_0_ring_get_rptr()
845 WREG32(mmUVD_RBC_RB_RPTR, 0); in uvd_v6_0_start()
847 ring->wptr = RREG32(mmUVD_RBC_RB_RPTR); in uvd_v6_0_start()
Dvcn_v1_0.c755 WREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR, 0); in vcn_v1_0_start()
757 ring->wptr = RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR); in vcn_v1_0_start()
880 return RREG32_SOC15(UVD, 0, mmUVD_RBC_RB_RPTR); in vcn_v1_0_dec_ring_get_rptr()
Duvd_v7_0.c75 return RREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_RPTR); in uvd_v7_0_ring_get_rptr()
1081 WREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR, 0); in uvd_v7_0_start()
1083 ring->wptr = RREG32_SOC15(UVD, k, mmUVD_RBC_RB_RPTR); in uvd_v7_0_start()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h358 #define mmUVD_RBC_RB_RPTR … macro