Home
last modified time | relevance | path

Searched refs:mmUVD_MPC_SET_MUXA0 (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h56 #define mmUVD_MPC_SET_MUXA0 0x3D79 macro
Duvd_4_2_d.h54 #define mmUVD_MPC_SET_MUXA0 0x3d79 macro
Duvd_5_0_d.h60 #define mmUVD_MPC_SET_MUXA0 0x3d79 macro
Duvd_6_0_d.h76 #define mmUVD_MPC_SET_MUXA0 0x3d79 macro
Duvd_7_0_offset.h164 #define mmUVD_MPC_SET_MUXA0 … macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h320 #define mmUVD_MPC_SET_MUXA0 … macro
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Duvd_v4_2.c296 WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040); in uvd_v4_2_start()
Duvd_v5_0.c342 WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040); in uvd_v5_0_start()
Duvd_v6_0.c768 WREG32(mmUVD_MPC_SET_MUXA0, 0x40c2040); in uvd_v6_0_start()
Dvcn_v1_0.c670 WREG32_SOC15(UVD, 0, mmUVD_MPC_SET_MUXA0, 0x40c2040); in vcn_v1_0_start()
Duvd_v7_0.c996 WREG32_SOC15(UVD, k, mmUVD_MPC_SET_MUXA0, 0x40c2040); in uvd_v7_0_start()