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Searched refs:mmUVD_JRBC_RB_CNTL (Results 1 – 2 of 2) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h242 #define mmUVD_JRBC_RB_CNTL macro
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c780 WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, (0x00000001L | 0x00000002L)); in vcn_v1_0_start()
785 WREG32_SOC15(UVD, 0, mmUVD_JRBC_RB_CNTL, 0x00000002L); in vcn_v1_0_start()
1517 reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_CNTL); in vcn_v1_0_jpeg_ring_set_patch_ring()
1529 reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_CNTL); in vcn_v1_0_jpeg_ring_set_patch_ring()
1562 reg = SOC15_REG_OFFSET(UVD, 0, mmUVD_JRBC_RB_CNTL); in vcn_v1_0_jpeg_ring_set_patch_ring()