Searched refs:mmUVD_CONTEXT_ID (Results 1 – 12 of 12) sorted by relevance
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_vcn.c | 256 WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0xCAFEDEAD); in amdgpu_vcn_dec_ring_test_ring() 264 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0)); in amdgpu_vcn_dec_ring_test_ring() 268 tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID)); in amdgpu_vcn_dec_ring_test_ring() 608 WREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0xCAFEDEAD); in amdgpu_vcn_jpeg_ring_test_ring() 618 PACKETJ(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0, 0, 0)); in amdgpu_vcn_jpeg_ring_test_ring() 623 tmp = RREG32(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID)); in amdgpu_vcn_jpeg_ring_test_ring()
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D | uvd_v4_2.c | 454 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v4_2_ring_emit_fence() 485 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v4_2_ring_test_ring() 492 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v4_2_ring_test_ring() 496 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v4_2_ring_test_ring()
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D | uvd_v5_0.c | 470 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v5_0_ring_emit_fence() 501 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v5_0_ring_test_ring() 508 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v5_0_ring_test_ring() 512 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v5_0_ring_test_ring()
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D | uvd_v6_0.c | 913 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v6_0_ring_emit_fence() 974 WREG32(mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v6_0_ring_test_ring() 981 amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0)); in uvd_v6_0_ring_test_ring() 985 tmp = RREG32(mmUVD_CONTEXT_ID); in uvd_v6_0_ring_test_ring()
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D | uvd_v7_0.c | 1160 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0)); in uvd_v7_0_ring_emit_fence() 1228 WREG32_SOC15(UVD, ring->me, mmUVD_CONTEXT_ID, 0xCAFEDEAD); in uvd_v7_0_ring_test_ring() 1236 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_CONTEXT_ID), 0)); in uvd_v7_0_ring_test_ring() 1240 tmp = RREG32_SOC15(UVD, ring->me, mmUVD_CONTEXT_ID); in uvd_v7_0_ring_test_ring()
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D | vcn_v1_0.c | 962 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_CONTEXT_ID), 0)); in vcn_v1_0_dec_ring_emit_fence()
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/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/uvd/ |
D | uvd_4_0_d.h | 38 #define mmUVD_CONTEXT_ID 0x3DBD macro
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D | uvd_4_2_d.h | 81 #define mmUVD_CONTEXT_ID 0x3dbd macro
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D | uvd_5_0_d.h | 87 #define mmUVD_CONTEXT_ID 0x3dbd macro
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D | uvd_6_0_d.h | 103 #define mmUVD_CONTEXT_ID 0x3dbd macro
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D | uvd_7_0_offset.h | 216 #define mmUVD_CONTEXT_ID … macro
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/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/ |
D | vcn_1_0_offset.h | 378 #define mmUVD_CONTEXT_ID … macro
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