Searched refs:mmSDMA1_CLK_CTRL (Results 1 – 9 of 9) sorted by relevance
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
D | mxgpu_vi.c | 94 mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100, 225 mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100, 250 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000,
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D | sdma_v3_0.c | 85 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000, 94 mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100 112 mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100 123 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000, 137 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000, 152 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000, 162 mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100
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D | sdma_v4_0.c | 75 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100), 130 SOC15_REG_GOLDEN_VALUE(SDMA1, 0, mmSDMA1_CLK_CTRL, 0xffffffff, 0x3f000100), 1462 def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_CLK_CTRL)); in sdma_v4_0_update_medium_grain_clock_gating() 1472 WREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_CLK_CTRL), data); in sdma_v4_0_update_medium_grain_clock_gating() 1490 def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_CLK_CTRL)); in sdma_v4_0_update_medium_grain_clock_gating() 1500 WREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_CLK_CTRL), data); in sdma_v4_0_update_medium_grain_clock_gating()
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D | sdma_v2_4.c | 68 mmSDMA1_CLK_CTRL, 0xff000fff, 0x00000000, 74 mmSDMA1_CLK_CTRL, 0xff000ff0, 0x00000100
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/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/oss/ |
D | oss_2_4_d.h | 273 #define mmSDMA1_CLK_CTRL 0x3603 macro
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D | oss_3_0_1_d.h | 332 #define mmSDMA1_CLK_CTRL 0x3603 macro
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D | oss_2_0_d.h | 317 #define mmSDMA1_CLK_CTRL 0x3603 macro
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D | oss_3_0_d.h | 448 #define mmSDMA1_CLK_CTRL 0x3603 macro
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/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/sdma1/ |
D | sdma1_4_0_offset.h | 68 #define mmSDMA1_CLK_CTRL 0x001b macro
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