Searched refs:mmSDMA0_GFX_RB_BASE_HI (Results 1 – 10 of 10) sorted by relevance
208 #define mmSDMA0_GFX_RB_BASE_HI … macro
212 #define mmSDMA0_GFX_RB_BASE_HI 0x0082 macro
189 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
216 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
248 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
341 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
481 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in cik_sdma_gfx_resume()
457 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v2_4_gfx_resume()
697 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v3_0_gfx_resume()
660 WREG32(sdma_v4_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_BASE_HI), ring->gpu_addr >> 40); in sdma_v4_0_gfx_resume()
