Searched refs:mmRLC_GPM_SCRATCH_DATA (Results 1 – 10 of 10) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 1972 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), in gfx_v9_1_init_rlc_save_restore_list()
1978 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); in gfx_v9_1_init_rlc_save_restore_list()
1982 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); in gfx_v9_1_init_rlc_save_restore_list()
1983 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, register_list_format[i++]); in gfx_v9_1_init_rlc_save_restore_list()
1987 WREG32_SOC15(GC, 0, mmRLC_GPM_SCRATCH_DATA, j); in gfx_v9_1_init_rlc_save_restore_list()
2002 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), list_size); in gfx_v9_1_init_rlc_save_restore_list()
2008 WREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_GPM_SCRATCH_DATA), in gfx_v9_1_init_rlc_save_restore_list()
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| D | gfx_v7_0.c | 3964 WREG32(mmRLC_GPM_SCRATCH_DATA, upper_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3965 WREG32(mmRLC_GPM_SCRATCH_DATA, lower_32_bits(adev->gfx.rlc.clear_state_gpu_addr)); in gfx_v7_0_init_gfx_cgpg()
3966 WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.clear_state_size); in gfx_v7_0_init_gfx_cgpg()
3970 WREG32(mmRLC_GPM_SCRATCH_DATA, 0); in gfx_v7_0_init_gfx_cgpg()
3975 WREG32(mmRLC_GPM_SCRATCH_DATA, adev->gfx.rlc.reg_list[i]); in gfx_v7_0_init_gfx_cgpg()
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| D | gfx_v8_0.c | 4087 WREG32(mmRLC_GPM_SCRATCH_DATA, register_list_format[i]); in gfx_v8_0_init_save_restore_list()
4092 WREG32(mmRLC_GPM_SCRATCH_DATA, list_size); in gfx_v8_0_init_save_restore_list()
4098 WREG32(mmRLC_GPM_SCRATCH_DATA, in gfx_v8_0_init_save_restore_list()
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| /Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_0_d.h | 1317 #define mmRLC_GPM_SCRATCH_DATA 0x312d macro
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| D | gfx_7_2_d.h | 1330 #define mmRLC_GPM_SCRATCH_DATA 0x312d macro
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| D | gfx_8_0_d.h | 1430 #define mmRLC_GPM_SCRATCH_DATA 0xec6d macro
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| D | gfx_8_1_d.h | 1427 #define mmRLC_GPM_SCRATCH_DATA 0xec6d macro
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| /Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6049 #define mmRLC_GPM_SCRATCH_DATA … macro
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| D | gc_9_1_offset.h | 6328 #define mmRLC_GPM_SCRATCH_DATA … macro
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| D | gc_9_2_1_offset.h | 6306 #define mmRLC_GPM_SCRATCH_DATA … macro
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