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Searched refs:mmRLC_CGCG_CGLS_CTRL_3D (Results 1 – 6 of 6) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c3650 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
3658 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
3668 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
3674 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
3856 data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_get_clockgating_state()
Dgfx_v8_0.c315 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
346 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
378 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
4243 tmp = RREG32(mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v8_0_rlc_resume()
4245 WREG32(mmRLC_CGCG_CGLS_CTRL_3D, tmp); in gfx_v8_0_rlc_resume()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_8_0_d.h1394 #define mmRLC_CGCG_CGLS_CTRL_3D 0xec9d macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h6191 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
Dgc_9_1_offset.h6470 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
Dgc_9_2_1_offset.h6446 #define mmRLC_CGCG_CGLS_CTRL_3D … macro