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Searched refs:mmMP1_SMN_C2PMSG_90 (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Dsmu9_smumgr.c66 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu9_wait_for_response()
74 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu9_wait_for_response()
106 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu9_send_msg_to_smc()
132 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu9_send_msg_to_smc_with_parameter()
Dsmu10_smumgr.c53 reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu10_wait_for_response()
58 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90); in smu10_wait_for_response()
84 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu10_send_msg_to_smc()
102 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_90, 0); in smu10_send_msg_to_smc_with_parameter()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/mp/
Dmp_10_0_offset.h298 #define mmMP1_SMN_C2PMSG_90 … macro
Dmp_9_0_offset.h310 #define mmMP1_SMN_C2PMSG_90 0x029a macro