Searched refs:mmMC_SEQ_WR_CTL_D0 (Results 1 – 7 of 7) sorted by relevance
1003 #define mmMC_SEQ_WR_CTL_D0 0x0A2F macro
643 #define mmMC_SEQ_WR_CTL_D0 0xa2f macro
747 #define mmMC_SEQ_WR_CTL_D0 0xa2f macro
2422 case mmMC_SEQ_WR_CTL_D0: in iceland_check_s0_mc_reg_index()2624 …gister(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0)); in iceland_initialize_mc_reg_table()
2492 case mmMC_SEQ_WR_CTL_D0: in ci_check_s0_mc_reg_index()2694 …gister(hwmgr->device, mmMC_SEQ_WR_CTL_D0_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
2873 case mmMC_SEQ_WR_CTL_D0: in tonga_check_s0_mc_reg_index()3091 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D0)); in tonga_initialize_mc_reg_table()
4597 case mmMC_SEQ_WR_CTL_D0: in ci_check_s0_mc_reg_index()4709 case mmMC_SEQ_WR_CTL_D0: in ci_register_patching_mc_seq()4798 WREG32(mmMC_SEQ_WR_CTL_D0_LP, RREG32(mmMC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()