Searched refs:mmMC_SEQ_WR_CTL_2 (Results 1 – 7 of 7) sorted by relevance
1001 #define mmMC_SEQ_WR_CTL_2 0x0AD5 macro
645 #define mmMC_SEQ_WR_CTL_2 0xad5 macro
749 #define mmMC_SEQ_WR_CTL_2 0xad5 macro
2450 case mmMC_SEQ_WR_CTL_2: in iceland_check_s0_mc_reg_index()2630 …register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2)); in iceland_initialize_mc_reg_table()
2520 case mmMC_SEQ_WR_CTL_2: in ci_check_s0_mc_reg_index()2700 …register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()
2901 case mmMC_SEQ_WR_CTL_2: in tonga_check_s0_mc_reg_index()3103 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_2)); in tonga_initialize_mc_reg_table()
4618 case mmMC_SEQ_WR_CTL_2: in ci_check_s0_mc_reg_index()4727 case mmMC_SEQ_WR_CTL_2: in ci_register_patching_mc_seq()4804 WREG32(mmMC_SEQ_WR_CTL_2_LP, RREG32(mmMC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()